Through-silicon via with air gap
View Patent ↗A semiconductor substrate having a through-silicon via with an air gap interposed between the through-silicon via and the semiconductor substrate is provided. An opening is formed partially through the semiconductor substrate. The opening is first lined with a liner and then the opening is filled with a conductive material. A backside of the semiconductor substrate is thinned to expose the liner, which is subsequently removed to form an air gap around the conductive material of the through-silicon via. A dielectric layer is formed of the backside of the semiconductor substrate to seal the air gap.
1. A method of forming a semiconductor device, the method comprising:
providing a semiconductor substrate, the semiconductor substrate having a first side and a second side opposite the first side;
forming an opening extending from the first side of the semiconductor substrate into the semiconductor substrate;
forming a liner along sidewalls of the opening;
forming a conductive material over the liner in the opening;
thinning the second side of the semiconductor substrate, thereby exposing the liner;
removing at least a portion of the liner interposed between the conductive material and the semiconductor substrate, thereby forming an air gap; and
forming a dielectric layer along the second side of the semiconductor substrate, thereby sealing the air gap on the second side of the semiconductor substrate.
2. The method of claim 1 , wherein the thinning the second side of the semiconductor substrate includes etching the second side of the semiconductor substrate such that a portion of the conductive material protrudes from the second side of the semiconductor substrate.
3. The method of claim 1 , wherein the liner extends over a second dielectric layer formed on the first side of the semiconductor substrate.
4. The method of claim 3 , wherein the removing includes removing at least a portion of the liner extending over the second dielectric layer.
5. The method of claim 1 , wherein the liner comprises TEOS.
6. The method of claim 5 , wherein the liner is removed by an XeF 2 dry etch.
7. A method of forming a semiconductor device, the method comprising:
providing a semiconductor substrate having a through-silicon via extending from a circuit side partially through the semiconductor substrate, a liner being interposed between the through-silicon via and the semiconductor substrate;
thinning a backside of the semiconductor substrate such that the liner is exposed;
removing at least a portion of the liner interposed between the through-silicon via and the semiconductor substrate, thereby forming an opening around the through-silicon via on the backside of the semiconductor substrate; and
forming a dielectric layer over the opening, leaving a sealed air gap interposed between the through-silicon via and the semiconductor substrate.
8. The method of claim 7 , wherein the liner comprises a dielectric material.
9. The method of claim 7 , wherein the liner extends over at least a portion of a second dielectric layer extending over the circuit side of the semiconductor substrate.
10. The method of claim 9 , wherein the removing at least the portion of the liner includes removing at least a portion of the liner extending over the second dielectric layer.
11. The method of claim 7 , wherein the providing the semiconductor substrate includes forming the through-silicon via through one or more dielectric layers on the circuit side of the semiconductor substrate.
12. The method of claim 7 , wherein the thinning the backside includes thinning the backside of the semiconductor substrate such that at least a portion of the through-silicon via protrudes from the backside of the semiconductor substrate.
13. The method of claim 7 , further comprising exposing the through-silicon via after the forming the dielectric layer such that the through-silicon via protrudes from the dielectric layer.