IP Library › Granted Patent US 7,982,494
Granted Patent B2
US 7,982,494 · App. 12/716,822 · Granted Jul 19, 2011

Systems and methods for detecting terminal state and setting output driver impedance

Assignee: Micron Technology, Inc.
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Quick Facts
Patent No.
US 7,982,494
App. No.
12/716,822
Granted
Jul 19, 2011
Kind
B2
Abstract

Embodiments of the present invention include systems for calibrating an output circuit. A comparator is coupled to a calibration terminal and configured to determine whether the calibration terminal is in a first state coupled to a calibration resistor or in a second state. A calibration circuit is coupled to the calibration terminal and configured to generate a calibration value based in part on the presence or absence of the calibration resistor. An impedance selector is coupled to the calibration circuit, the comparator, and a default calibration value. The impedance selector is configured to select the default calibration value when the comparator indicates the calibration terminal is in the second state and to select the calibration value coupled from the calibration circuit when the comparator indicates the calibration terminal is in the first state.

Claims (25)

1. A method for calibrating an output circuit, the method comprising:

initiating a calibration procedure in an electronic device, the calibration procedure configured to generate a calibration value based in part on an impedance at a calibration terminal of an electronic device; and

selecting between the calibration value and a default value based in part on the presence or absence of a calibration resistor at the calibration terminal.

2. The method of claim 1 , wherein the act of initiating the calibration procedure occurs responsive to receipt of a calibration command.

3. The method of claim 2 , further comprising monitoring an electronic property of the calibration terminal responsive to receipt of the calibration command.

4. The method of claim 3 , wherein the electronic property comprises voltage.

5. The method of claim 3 , wherein the act of selecting between the calibration value and a default value comprises selecting the calibration value when the electronic property of the calibration terminal satisfies a condition and selecting the default value when the electronic property of the calibration terminal fails to satisfy the condition.

6. The method of claim 5 , wherein the condition comprises a comparison with a threshold value of the electronic property.

7. The method of claim 3 , wherein the act of monitoring an electronic property of the calibration terminal occurs at least in part simultaneously with the calibration procedure.

8. The method of claim 3 , further comprising determining the presence or absence of a calibration resistor at the calibration terminal.

9. The method of claim 1 , further comprising adjusting an impedance of the output circuit based, at least in part, on the selected value.

10. A circuit for selecting a calibration value, the circuit comprising:

a calibration circuit including a first input terminal and a first output terminal, the first input terminal coupled to a calibration terminal, the calibration circuit configured to provide a first output signal at the first output terminal, the first output signal indicative of a first calibration value based, at least in part, on an impedance of the calibration terminal;

a comparator including a second input terminal and a second output terminal, the second input terminal coupled to the calibration terminal, the comparator configured to monitor an electrical property of the calibration terminal and provide a second output signal at the second output terminal, the second output signal indicative of a state of the calibration terminal; and

an impedance selector including a third input terminal coupled to the first output terminal and configured to receive the first output signal, a fourth input terminal configured to receive a signal indicative of a second calibration value, a control terminal coupled to the second output terminal and configured to receive the second output signal, and a third output terminal configured to provide a third output signal indicative of either the first or second calibration value in accordance with the second output signal.

11. The circuit of claim 10 , wherein the control terminal comprises a first control terminal, and wherein the calibration circuit includes a second control terminal and the command decoder includes a third control terminal, wherein the first and second control terminals are configured to receive a command signal, and wherein the calibration circuit and the comparator are configured to enable responsive to receipt of the command signal.

12. The circuit of claim 11 , further comprising a command decoder configured to provide the command signal to the calibration circuit and the comparator.

13. The circuit of claim 10 , further comprising a latch coupled to the comparator, the latch configured to store the state of the calibration terminal.

14. The circuit of claim 10 , wherein the comparator is configured to generate the second output signal during at least a portion of time the calibration circuit is generating the first output signal.

15. The circuit of claim 10 , wherein the calibration circuit includes a pull-up driver configured to couple to the calibration terminal and a pull-down driver configured to couple to the calibration terminal.

16. The circuit of claim 15 , wherein the comparator is configured to monitor a voltage of the calibration terminal during at least a portion of time the pull-up driver is coupled to the calibration terminal.

17. The circuit of claim 16 , wherein the comparator is configured to monitor a voltage of the calibration terminal during at least a portion of the time the pull-down driver is coupled to the calibration terminal.

18. The circuit of claim 10 , wherein the electrical property comprises a voltage.

19. The circuit of claim 10 , further comprising an adjustable output driver having a fourth input terminal coupled to the third output terminal and configured to receive the third output signal indicative of either the first or second calibration value.

20. The circuit of claim 10 , wherein the comparator is configured to compare a value of the electrical property of the calibration terminal with a threshold value.

Assignments (7)
RELEASE OF SECURITY INTEREST Recorded Nov 12, 2019
From: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.; MICRON SEMICONDUCTOR PRODUCTS, INC.
Reel/Frame 051028/0001 →
RELEASE OF SECURITY INTEREST Recorded Oct 9, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.
Reel/Frame 050937/0001 →
RELEASE OF SECURITY INTEREST Recorded Aug 23, 2018
From: U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.
Reel/Frame 047243/0001 →
SECURITY INTEREST Recorded Jul 13, 2018
From: MICRON TECHNOLOGY, INC.; MICRON SEMICONDUCTOR PRODUCTS, INC.
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 047540/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REPLACE ERRONEOUSLY FILED PATENT #7358718 WITH THE CORRECT PATENT #7358178 PREVIOUSLY RECORDED ON REEL 038669 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY INTEREST. Recorded Jun 8, 2017
From: MICRON TECHNOLOGY, INC.
To: U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT
Reel/Frame 043079/0001 →
PATENT SECURITY AGREEMENT Recorded Jun 2, 2016
From: MICRON TECHNOLOGY, INC.
To: MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL AGENT
Reel/Frame 038954/0001 →
SECURITY INTEREST Recorded May 12, 2016
From: MICRON TECHNOLOGY, INC.
To: U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT
Reel/Frame 038669/0001 →
Continuity (2)
Continuation 12355593 · Jan 16, 2009
Related Publication 20100182014A1 · Jul 22, 2010