IP Library Granted Patent US 8,008,188
Granted Patent B2
US 8,008,188 · App. 11/760,804 · Granted Aug 30, 2011

Method of forming solid blind vias through the dielectric coating on high density interconnect substrate materials

Assignee: PPG Industries Ohio, Inc.
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 8,008,188
App. No.
11/760,804
Granted
Aug 30, 2011
Kind
B2
Abstract

A method is provided comprising: coating an electrically conductive core with a first removable material, creating openings in the first removable material to expose portions of the electrically conductive core, plating a conductive material onto the exposed portions of the electrically conductive core, coating the conductive material with a second removable material, removing the first removable material, electrophoretically coating the electrically conductive core with a dielectric coating, and removing the second removable material.

Claims (39)

1. A method for coating an electrically conductive core, the method comprising:

coating an electrically conductive core with a first removable material;

creating openings in the first removable material to expose portions of the electrically conductive core;

plating a conductive material onto the exposed portions of the electrically conductive core;

coating the conductive material with a second removable material;

removing the first removable material;

electrophoretically coating the electrically conductive core with a dielectric coating; and

removing the second removable material.

2. The method of claim 1 , wherein the first and second removable materials are removed using different chemistries.

3. The method of claim 1 , wherein the first removable material comprises a negative-acting resist, and the second removable coating comprises a positive-acting resist.

4. The method of claim 1 , wherein the first removable material comprises a positive-acting resist, and the second removable coating comprises a negative-acting resist.

5. The method of claim 1 , wherein the dielectric coating is cured.

6. The method of claim 1 , further comprising:

applying a conductive layer on all surfaces.

7. The method of claim 6 , where the conductive layer is electrolessly applied.

8. The method of claim 7 , where the conductive layer is further electroplated.

9. The method of claim 6 , where the conductive layer is sputtered.

10. The method of claim 9 , where the conductive layer is further electroplated.

11. A method for coating an electrically conductive core, the method comprising:

applying a layer of a first conductive material to a substrate having a dielectric coating on a conductive core and conductive vias extending through openings in the dielectric coating;

applying a layer of a first removable material to the first conductive material;

forming openings in the first removable material to expose areas of the conductive material to be plated;

plating a second conductive material onto the exposed areas of the first conductive material;

applying a layer of a second removable material to the first and second conductive material;

forming openings in the second removable material to expose areas of the second conductive material to be plated; and

plating a third conductive material onto the exposed areas of the second conductive material.

12. The method of claim 11 , wherein of applying a layer of a first conductive material to a substrate comprises:

using electroless deposition to deposit a seed layer; and

plating the first conductive material onto the seed layer.

13. The method of claim 12 , further comprising:

removing the first removable material; and

etching the seed layer.

14. The method of claim 11 , wherein applying a layer of a first conductive material to a substrate comprises:

sputter depositing a seed layer; and

plating the first conductive material onto the seed layer.

15. The method of claim 14 , further comprising:

removing the first removable material; and

etching the seed layer.

16. The method of claim 11 , wherein the first and second removable materials are plating resists.

Assignments (2)
CONFIRMATORY LICENSE Recorded Dec 13, 2010
From: GENERAL ELECTRIC COMPANY
To: ENERGY, UNITED STATES DEPARTMENT OF
Reel/Frame 025578/0739 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 11, 2007
From: OLSON, KEVIN C.; WANG, ALAN E.
To: PPG INDUSTRIES OHIO, INC.
Reel/Frame 019405/0474 →
Continuity (1)
Related Publication 20080305626A1 · Dec 11, 2008