IP Library Granted Patent US 8,093,705
Granted Patent B2
US 8,093,705 · App. 12/320,286 · Granted Jan 10, 2012

Dual face package having resin insulating layer

Assignee: Samsung Electro-Mechanics Co., Ltd.
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 8,093,705
App. No.
12/320,286
Granted
Jan 10, 2012
Kind
B2
Abstract

A dual face package includes a semiconductor substrate including a through-electrode connected to a die pad disposed on one side of the semiconductor substrate, and a lower redistribution layer disposed on another side thereof and connected to the through-electrode, an insulating layer including a post electrode connected to the through-electrode, and an upper redistribution layer disposed on one side thereof and connected to the post electrode, and an adhesive layer disposed on the one side of the semiconductor substrate so as to attach the insulating layer to the semiconductor substrate such that the through-electrode is connected to the post electrode.

Claims (14)

1. A dual face package, comprising:

a semiconductor substrate, having a flat surface, including a through-electrode connected to a die pad disposed on one side of the semiconductor substrate, and a lower redistribution layer disposed on another side of the semiconductor substrate and connected to the through-electrode;

a resin insulating layer including a post electrode connected to the through-electrode, and an upper redistribution layer disposed on one side of the resin insulating layer and directly connected to the post electrode, the post electrode formed on the inside of the resin insulating layer; and

an adhesive layer disposed on the one side of the semiconductor substrate so as to attach the resin insulating layer to the semiconductor substrate such that the through-electrode is connected to the post electrode.

2. The dual face package according to claim 1 , wherein the adhesive layer is disposed on the one side of the semiconductor substrate such that the through-electrode is exposed therethrough.

3. The dual face package according to claim 1 , wherein the adhesive layer is made of a conductive adhesive such as an anisotropic conductive film.

4. The dual face package according to claim 1 , further comprising an external connecting terminal disposed on the upper redistribution layer, the lower redistribution layer, or both the lower and upper redistribution layers.

5. A dual face package, comprising:

a semiconductor substrate, having a flat surface, including a through-electrode connected to a die pad disposed on one side of the semiconductor substrate, and a lower redistribution layer disposed on another side of the semiconductor substrate and connected to the through-electrode;

a resin insulating layer including a post electrode connected to the through-electrode, and an upper redistribution layer disposed on one side of the resin insulating layer and directly connected to the post electrode, the post electrode formed on the inside of the resin insulating layer, the resin insulation layer being a resin sealing layer; and

an adhesive layer disposed on the one side of the semiconductor substrate so as to attach the resin insulating layer to the semiconductor substrate such that the through-electrode is connected to the post electrode.

6. The dual face package according to claim 5 , wherein the adhesive layer is disposed on the one side of the semiconductor substrate such that the through-electrode is exposed therethrough.

7. The dual face package according to claim 5 , wherein the adhesive layer is made of a conductive adhesive such as an anisotropic conductive film.

8. The dual face package according to claim 5 , further comprising an external connecting terminal disposed on the upper redistribution layer, the lower redistribution layer or both the lower and upper redistribution layers.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 22, 2009
From: PARK, SEUNG WOOK; KWEON, YOUNG DO; YUAN, JINGLI; MOON, SEON HEE; HONG, JU PYO; LEE, JAE KWANG
To: SAMSUNG ELECTRO-MECHANICS CO., LTD.
Reel/Frame 022220/0153 →
Priority Claims (1)
KR 10-2008-0105418 · Oct 27, 2008 · national
Continuity (1)
Related Publication 20100102426A1 · Apr 29, 2010