IP Library Granted Patent US 8,106,521
Granted Patent B2
US 8,106,521 · App. 12/445,793 · Granted Jan 31, 2012

Semiconductor device mounted structure with an underfill sealing-bonding resin with voids

Assignee: Panasonic Corporation
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Quick Facts
Patent No.
US 8,106,521
App. No.
12/445,793
Granted
Jan 31, 2012
Kind
B2
Abstract

In a semiconductor device mounted structure in which device electrodes of a semiconductor device and board electrodes of a board are connected to each other via bump electrodes, respectively, and in which a sealing-bonding resin is placed between the semiconductor device and the board, a void portion is placed at a position corresponding to an edge portion of the semiconductor device in the sealing-bonding resin. Thus, stress loads generated at corner portions of the semiconductor device due to board flexures for differences in thermal expansion and thermal contraction among the individual members caused by heating and cooling during mounting of the semiconductor device, as well as for mechanical loads after the mounting process, can be absorbed by the void portion and thereby reduced, so that breakdown of the semiconductor device mounted structure is prevented.

Claims (29)

1. A semiconductor device mounted structure comprising:

a generally rectangular-shaped semiconductor device having a plurality of device electrodes;

a board having a plurality of board electrodes;

a plurality of bump electrodes connecting the device electrodes and the board electrodes to each other, respectively; and

a sealing-bonding resin which seals the device electrodes, the board electrodes and the bump electrodes, respectively, and which is placed between the semiconductor device and the board so as to bond the semiconductor device and the board to each other, wherein

in the sealing-bonding resin, a void portion is formed at a position corresponding to an edge portion, or its proximity, of the semiconductor device;

wherein said void portion is one of a plurality of void portions formed in the resin just under all corner portions of the generally rectangular-shaped semiconductor device.

2. The semiconductor device mounted structure as defined in claim 1 , wherein the sealing-bonding resin is an insulative resin sheet or anisotropic electroconductive resin sheet.

3. A semiconductor device mounted structure comprising:

a semiconductor device having a plurality of device electrodes;

a board having a plurality of board electrodes;

a plurality of bump electrodes connecting the device electrodes and the board electrodes to each other, respectively; and

a sealing-bonding resin which seals the device electrodes, the board electrodes and the bump electrodes, respectively, and which is placed between the semiconductor device and the board so as to bond the semiconductor device and the board to each other, wherein

in the sealing-bonding resin, a void portion is formed at a position corresponding to an edge portion, or its proximity, of the semiconductor device;

wherein the void portion is formed at a position corresponding to a corner portion, or its proximity, of the generally rectangular-shaped semiconductor device; and

wherein a recess portion is formed at a position on the board facing the corner portion of the semiconductor device, and an inner space of the recess portion is Covered with the resin, whereby the void portion is formed.

4. The semiconductor device mounted structure as defined in claim 3 , wherein the recess portion is formed on an upper surface of a recess-portion-forming board electrode which is formed on the board at a position facing the corner portion of the semiconductor device and which is not connected to any of the device electrodes.

5. The semiconductor device mounted structure as defined in claim 3 , wherein the sealing-bonding resin is an insulative resin sheet or anisotropic electroconductive resin sheet.

6. A semiconductor device mounted structure comprising:

a semiconductor device having a plurality of device electrodes;

a board having a plurality of board electrodes;

a plurality of bump electrodes connecting the device electrodes and the board electrodes to each other, respectively; and

a sealing-bonding resin which seals the device electrodes, the board electrodes and the bump electrodes, respectively, and which is placed between the semiconductor device and the board so as to bond the semiconductor device and the board to each other, wherein

in the sealing-bonding resin, a void portion is formed at a position corresponding to an edge portion, or its proximity, of the semiconductor device;

wherein the resin has a two-layer structure of first and second resin sheets, and

wherein the first resin sheet to be placed on the board side is formed smaller in outer shape than the second resin sheet to be placed on the semiconductor device side, and a space adjacent to an outer periphery of the first resin sheet is covered with the second resin sheet, whereby the void portion is formed.

7. The semiconductor device mounted structure as defined in claim 6 , wherein the outer shape of the first resin sheet is set generally equal to or smaller than the outer shape of the semiconductor device.

8. The semiconductor device mounted structure as defined in claim 6 , wherein a viscosity of a resin material from which the first resin sheet is formed is higher than a viscosity of a resin material from which the second resin sheet is formed.

9. The semiconductor device mounted structure as defined in claim 6 , wherein the sealing-bonding-use resin is an insulative resin sheet or anisotropic electroconductive resin sheet.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 9, 2009
From: IWASE, TEPPEI; TOMURA, YOSHIHIRO; NOBORI, KAZUHIRO
To: PANASONIC CORPORATION
Reel/Frame 022799/0520 →
Priority Claims (1)
JP 2006-284895 · Oct 19, 2006 · national
Continuity (1)
Related Publication 20110001233A1 · Jan 6, 2011