IP Library Granted Patent US 8,115,318
Granted Patent B2
US 8,115,318 · App. 12/773,493 · Granted Feb 14, 2012

Semiconductor device having silicon-diffused metal wiring layer and its manufacturing method

Assignee: Renesas Electronics Corporation
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Quick Facts
Patent No.
US 8,115,318
App. No.
12/773,493
Granted
Feb 14, 2012
Kind
B2
Abstract

In a semiconductor device, an insulating interlayer having a groove is formed on an insulating underlayer. A silicon-diffused metal layer including no metal silicide is buried in the groove. A metal diffusion barrier layer is formed on the silicon-diffused metal layer and the insulating interlayer.

Claims (25)

1. A semiconductor device comprising:

an insulating underlayer;

a first insulating interlayer formed on said insulating underlayer, said first insulating interlayer having a groove;

a first silicon-diffused metal layer buried in said groove;

a first metal diffusion barrier layer formed on said first silicon-diffused metal layer and said first insulating interlayer;

a second insulating interlayer formed on said first metal diffusion barrier layer, said second insulating interlayer and said first metal diffusion barrier layer having a via hole opposing said groove of said first insulating interlayer;

a third insulating interlayer formed on said second insulating interlayer, said third insulating interlayer having a trench opposing said via hole;

a second silicon-diffused metal layer buried in said trench and said via hole; and

a second metal diffusion barrier layer formed on said second silicon-diffused metal layer and said third insulating interlayer.

2. The device as set forth in claim 1 , wherein said second insulating interlayer comprises at least one of a SiO 2 layer, a SiCN layer, a SiC layer, a SiOC layer and a low-k material layer.

3. The device as set forth in claim 2 , wherein said low-k material layer comprises one of a ladder-type hydrogen siloxane layer and a porous ladder-type hydrogen siloxane layer.

4. The device as set forth in claim 1 , wherein the upper surface portions of said second silicon-diffused metal layer and the third insulating layer are nitrided.

5. The device as set forth in claim 3 , wherein said ladder-type hydrogen siloxane layer has a density of about 1.50 g/cm 3 to 1.58 g/cm 3 .

6. The device as set forth in claim 3 , wherein said ladder-type hydrogen siloxane layer has a refractive index of about 1.38 to 1.40 at a wavelength of about 633 nm.

7. The device as set forth in claim 3 , further comprising a mask insulating layer made of silicon dioxide formed on the one of said ladder-type hydrogen siloxane layer and said porous ladder-type hydrogen siloxane layer.

8. The device as set forth in claim 1 , wherein said second silicon-diffused metal layer has a larger silicon concentration near an upper side thereof than near a lower side thereof.

9. The device as set forth in claim 1 , wherein said second silicon-diffused metal layer comprises a silicon-diffused copper layer.

10. The device as set forth in claim 9 , wherein a silicon component of said silicon-diffused copper layer is less than 8 atoms %.

11. The device as set forth in claim 1 , wherein said second silicon-diffused metal layer comprises a silicon-diffused copper alloy layer including at least one of Al, Ag, W, Mg, Fe, Ni, Zn, Pd, Cd, Au, Hg, Be, Pt, Zr, Ti and Sn.

12. The device as set forth in claim 1 , wherein said second silicon-diffused metal layer includes no metal silicide.

13. The device as set forth in claim 1 , wherein said second silicon-diffused metal layer includes hydrogen.

14. The device as set forth in claim 1 , wherein said second silicon-diffused metal layer includes carbon.

15. The device as set forth in claim 1 , wherein said second metal diffusion barrier layer comprises at least one of a SiCN layer, a SiC layer, a SiOC layer and an organic material layer.

16. The device as set forth in claim 1 , further comprising a second etching stopper between said second and third insulating interlayers, said second etching stopper having a trench opposing said trench.

17. The device as set forth in claim 16 , wherein said second etching stopper comprises at least one of a SiCN layer, a SiC layer, a SiOC layer and an organic material layer.

Assignments (2)
CHANGE OF ADDRESS Recorded Nov 29, 2017
From: RENESAS ELECTRONICS CORPORATION
To: RENESAS ELECTRONICS CORPORATION
Reel/Frame 044928/0001 →
CHANGE OF NAME Recorded Oct 26, 2010
From: NEC ELECTRONICS CORPORATION
To: RENESAS ELECTRONICS CORPORATION
Reel/Frame 025191/0985 →
Priority Claims (3)
JP 2002-132780 · May 8, 2002 · national
JP 2002-302841 · Oct 17, 2002 · national
JP 2003-130484 · May 8, 2003 · national
Continuity (4)
Division 11647187 · Dec 29, 2006
Continuation 10650193 · Aug 28, 2003
Continuation In Part 10281321 · Oct 28, 2002
Related Publication 20100224995A1 · Sep 9, 2010