Semiconductor device and method of manufacturing the same
The semiconductor device has a stacked structure in which a tunnel oxide layer, a charge trapping layer, a blocking oxide layer, and a gate electrode are sequentially formed on a silicon substrate, wherein the blocking oxide layer includes a crystalline layer disposed adjacent to the charge trapping layer and an amorphous layer disposed adjacent to the gate electrode.
1. A semiconductor device having a stacked structure, comprising a tunnel oxide layer, a charge trapping layer, a blocking oxide layer, and a gate electrode sequentially formed on a silicon substrate,
wherein the blocking oxide layer comprises a crystalline layer disposed to contact the charge trapping layer and an amorphous layer disposed to contact the gate electrode.
2. The semiconductor device of claim 1 , wherein the charge trapping layer comprises SiN.
3. The semiconductor device of claim 1 , wherein the crystalline layer comprises any one of Al 2 O 3 , HfO 2 , ZrO 2 , Ta 2 O 5 , Y 2 O 3 , and a lanthanoid oxide.
4. The semiconductor device of claim 1 , wherein the amorphous layer comprises any one of a SiO 2 layer, an aluminum silicate layer, an Al 2 O 3 layer, and an Al 2 O 3 —SiO 2 laminated layer.
5. A method of manufacturing a semiconductor device, in which a tunnel oxide layer, a charge trapping layer, a blocking oxide layer, and a gate electrode are sequentially formed on a silicon substrate, wherein the blocking oxide layer is formed using a method comprising:
forming a crystalline layer on the charge trapping layer; and
forming an amorphous layer over the crystalline layer,
wherein the amorphous layer is formed to contact the gate electrode.
6. The method of claim 5 , wherein the forming of the crystalline layer comprises:
forming an amorphous layer on the charge trapping layer; and
heating the amorphous layer, so that the amorphous layer is crystallized to serve as the crystalline layer.
7. The method of claim 5 , wherein the forming of the crystalline layer and the forming of the amorphous layer is consecutively performed by a batch processing apparatus within a same cylindrical processing container,
wherein the batch processing apparatus, vertically stacks a plurality of the silicon substrates to be apart from each other within the processing container and processes the silicon substrates, and comprises a mechanism for supplying processing gas into the processing container, a mechanism for plasmarizing the processing gas, a mechanism for heating the silicon substrates, and a mechanism for vacuum-exhausting the internal atmosphere of the processing container.
8. A method of manufacturing a semiconductor device, in which a tunnel oxide layer, a charge trapping layer, a blocking oxide layer, and a gate electrode are sequentially formed on a silicon substrate, wherein the blocking oxide layer is formed using a method comprising:
forming a first amorphous layer on the charge trapping layer;
forming a second amorphous layer, which is not easily crystallized by the first amorphous layer, on the first amorphous layer; and
crystallizing the first amorphous layer by heating at a temperature at which the first amorphous layer is to be crystallized and the second amorphous layer is not to be crystallized.
9. The method of claim 8 , wherein the forming of the first amorphous layer and the forming of the second amorphous layer is consecutively performed by a batch processing apparatus within a same cylindrical processing container,
wherein the batch processing apparatus vertically stacks a plurality of the silicon substrates to be apart from each other within the processing container and processes the silicon substrates, and comprises a mechanism for supplying processing gas into the processing container, a mechanism for plasmarizing the processing gas, a mechanism for heating the silicon substrates, and a mechanism for vacuum-exhausting the internal atmosphere of the processing container.
10. A method of manufacturing a semiconductor device, in which a tunnel oxide layer, a charge trapping layer, a blocking oxide layer, and a gate electrode are sequentially formed on a silicon substrate,
wherein forming of the charge trapping layer comprises forming a crystalline layer, and
forming of the blocking oxide layer comprises forming an amorphous layer.
11. The method of claim 10 , wherein the forming of the charge trapping layer and the forming of the blocking oxide layer is consecutively performed by a batch processing apparatus within a same cylindrical processing container,
wherein the batch processing apparatus vertically stacks a plurality of the silicon substrates to be apart from each other within the processing container and processes the silicon substrates, and comprises a mechanism for supplying processing gas into the processing container, a mechanism for plasmarizing the processing gas, a mechanism for heating the silicon substrates, and a mechanism for vacuum-exhausting the internal atmosphere of the processing container.