IP Library › Granted Patent US 8,154,123
Granted Patent B2
US 8,154,123 · App. 12/707,872 · Granted Apr 10, 2012

Solder bump, semiconductor chip, method of manufacturing the semiconductor chip, conductive connection structure, and method of manufacturing the conductive connection structure

Assignee: Panasonic Corporation
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Quick Facts
Patent No.
US 8,154,123
App. No.
12/707,872
Granted
Apr 10, 2012
Kind
B2
Abstract

A solder bump and a conductive connection structure are provided which can conductively connect a semiconductor chip and a substrate with high connection reliability. Filler 5 is contained in a solder bump 6 and a solder joint 17 which connect a connection electrode 3 of a semiconductor chip 2 and a substrate 11 , and the filler has a larger density on the side of the connection electrode 3 than on the side of the substrate 11 in the solder joint 17 . Therefore, in the cooling solidification of solder, the shrinkage of the solder joint 17 near the connection electrode 3 of the semiconductor chip 2 is reduced by the filler 5 and the occurrence of a stress is reduced on the peripheral portion of the connection electrode 3 , thereby preventing the occurrence of cracks near the joint.

Claims (21)

1. A solder bump provided on a connection electrode of a semiconductor chip to connect the connection electrode of the semiconductor chip and a substrate,

wherein the solder bump contains filler having a lower thermal expansion coefficient than solder of the solder bump, and the filler has a higher density on an end of the solder bump than on a base of the solder bump.

2. The solder bump according to claim 1 , wherein the filler has a porous surface.

3. The solder bump according to claim 1 , wherein the filler has a linear expansion coefficient of 0.1×10 −6 /° C. to 11×10 −6 /° C. and a specific gravity of 1.0 g/cm 3 to 6.0 g/cm 3 .

4. A semiconductor chip comprising the solder bump according to claim 1 .

5. The semiconductor chip according to claim 4 , wherein the solder bump is provided on the connection electrode of the semiconductor chip via an under bump metal, the under bump metal has a step formed thereon, and the base of the solder bump is provided so as to contain the step.

6. A method of manufacturing the semiconductor chip according to claim 4 , comprising the steps of:

forming the solder bump containing the filler on the semiconductor chip; and

melting the solder containing the filler,

wherein in the melting step, the semiconductor chip is vibrated to segregate the filler in the solder bump in a state in which the solder bump is disposed on the semiconductor chip.

7. A conductive connection structure comprising a solder joint formed by joining a solder bump provided on a connection electrode of a semiconductor chip and a solder portion provided on a substrate, the semiconductor chip being mounted on the substrate via the solder joint,

wherein the solder joint contains filler having a lower thermal expansion coefficient than solder of the solder joint, and the filler has a larger density on a side of the connection electrode than on a side of the substrate in the solder joint.

8. The conductive connection structure according to claim 7 , wherein the density of the filler is a volume ratio of 20% to 50% on the side of the connection electrode in the solder joint.

9. The conductive connection structure according to claim 7 , wherein the density of the filler is a volume ratio of 35% to 50% on the side of the connection electrode in the solder joint.

10. The conductive connection structure according to claim 7 , wherein the filler has a porous surface.

11. The conductive connection structure according to claim 7 , wherein the filler has a linear expansion coefficient of 0.1×10 −6 /° C. to 11×10 −6 /° C. and a specific gravity of 1.0 g/cm 3 to 6.0 g/cm 3 .

12. The conductive connection structure according to claim 7 , wherein the solder joint is connected to the connection electrode of the semiconductor chip via an under bump metal, the under bump metal has a step formed thereon, and the solder joint has a portion connected to the under bump metal so as to contain the step.

13. A method of manufacturing the conductive connection structure according to claim 7 , comprising the steps of:

placing the semiconductor chip in contact with a predetermined position of the substrate; and

melting the solder bump of the semiconductor chip,

wherein in the melting step, one of the substrate and the semiconductor chip is vibrated in a state in which the semiconductor chip is disposed on the substrate, so that the filler is segregated in the solder bump to form the solder joint.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 5, 2010
From: KONDOU, SHIGERU; TOMURA, YOSHIHIRO
To: PANASONIC CORPORATION
Reel/Frame 024340/0010 →
Priority Claims (2)
JP 2009-037258 · Feb 20, 2009 · national
JP 2010-028342 · Feb 12, 2010 · national
Continuity (1)
Related Publication 20100213609A1 · Aug 26, 2010