Semiconductor device with alternately arranged P-type and N-type thin semiconductor layers and method for manufacturing the same
View Patent ↗The invention is related to a semiconductor device with alternately arranged P-type and N-type thin semiconductor layers and method for manufacturing the same. For P-type device, the method includes trench formation, thermal oxide formation on trench sidewalls, N-type silicon formation in trenches, N-type impurity diffusion through thermal oxide into P-type epitaxial layer, oxidation of N-type silicon in trenches and oxide removal. In the semiconductor device, N-type thin semiconductor layers are formed by N-type impurity diffusion through oxide to P-type epitaxial layers, and trenches are filled with oxide. With this method, relatively low concentration impurity in high voltage device can be realized by current mass production process, and the device development cost and manufacturing cost are decreased.
1. A manufacturing method of a semiconductor device with alternately arranged P-type and N-type thin semiconductor layers, comprising the following steps:
step1: depositing dielectric on a P-type epitaxial layer;
step2: forming trenches in the dielectric and the P-type epitaxial layer by lithography and etching;
step3: forming thermal oxide film on the surfaces of the trenches and the dielectric;
step4: depositing N-type silicon on the thermal oxide film, wherein the N-type silicon is polysilicon or amorphous silicon;
step5: diffusing the N-type impurity of the N-type silicon within the trenches through the thermal oxide film into the P-type epitaxial layer by thermal diffusion technique;
step6: completely oxidizing the N-type silicon to fully fill the trenches with oxide;
step7: removing the oxide and the dielectric on the P-type epitaxial layer.
2. The manufacturing method according to claim 1 , wherein, in step 1, the dielectric is oxide.
3. The manufacturing method according to claim 1 , wherein, in step 1, the dielectric is an oxide layer with a nitride layer formed thereon.
4. The manufacturing method according to claim 1 , wherein, in step 2, photo resist or the dielectric is used as a block mask in the etching process to form the trenches.
5. The manufacturing method according to claim 1 , wherein, the thermal oxide film and the dielectric on the P-type epitaxial layer after step 3 are thick enough to block the diffusion of the N-type impurity of the N-type silicon into the P-type epitaxial layer in step 5.
6. The manufacturing method according to claim 1 , wherein, in step 4, the thickness of the N-type silicon in the trenches is less than 0.25 times of the width of the trench.
7. A semiconductor device structure with alternately arranged P-type and N-type thin semiconductor layers, comprising:
a P-type epitaxial layer;
trenches formed in the P-type epitaxial layer, wherein, each trench has a thermal oxide film formed on its surface, and the trenches are fully filled with oxide;
N-type thin semiconductor layers, formed in the P-type epitaxial layer and beside the sidewalls of the trenches, the N-type thin semiconductor layers being formed by thermal diffusion of N-type impurity through the thermal oxide film into the P-type epitaxial layer, wherein the N-type impurity comes from an N-type silicon formed by polysilicon or amorphous silicon, the N-type silicon being deposited on the thermal oxide film in the trenches and being completely oxidized to form oxide to fill the trenches after the thermal diffusion.
8. A manufacturing method of a semiconductor device structure with alternately arranged P-type and N-type thin semiconductor layers, comprising the following steps:
step1: depositing dielectric on an N-type epitaxial layer;
step2: forming trenches in the dielectric and the N-type epitaxial layer by lithography and etching;
step3: forming thermal oxide film on the surfaces of the trenches and the dielectric;
step4: depositing P-type silicon on the thermal oxide film, wherein the P-type silicon is polysilicon or amorphous silicon;
step5: diffusing the P-type impurity of the P-type silicon within the trenches through the thermal oxide film into the N-type epitaxial layer by thermal diffusion technique;
step6: completely oxidizing the P-type silicon to fully fill the trenches with oxide;
step7: removing the oxide and the dielectric on the N-type epitaxial layer.
9. The manufacturing method according to claim 8 , wherein, in step 1, the dielectric is oxide.
10. The manufacturing method according to claim 8 , wherein, in step 1, the dielectric is an oxide layer with a nitride layer formed thereon.
11. The manufacturing method according to claim 8 , wherein, in step 2, photo resist or the dielectric is used as a block mask in the etching process to form the trenches.
12. The manufacturing method according to claim 8 , wherein, the thermal oxide film and the dielectric on the N-type epitaxial layer after step 3 are thick enough to block the diffusion of the P-type impurity of the P-type silicon into the N-type epitaxial layer in step 5.
13. The manufacturing method according to claim 8 , wherein, in step 4, the thickness of the P-type silicon in the trench is less than 0.25 times of the width of the trench.
14. A semiconductor device structure with alternately arranged P-type and N-type thin semiconductor layers, comprising:
an N-type epitaxial layer;
trenches formed in the N-type epitaxial layer, wherein, each trench has a thermal oxide film formed on its surface, and the trenches are fully filled with oxide;
P-type thin semiconductor layers, formed in the N-type epitaxial layer and beside the sidewalls of the trenches, the P-type thin semiconductor layers being formed by thermal diffusion of P-type impurity through the thermal oxide film into the N-type epitaxial layer, wherein, the P-type impurity comes from P-type silicon formed by polysilicon or amorphous silicon, the P-type silicon being deposited on the thermal oxide film in the trenches and being completely oxidized to form oxide to fill the trenches after the thermal diffusion.