IP Library Granted Patent US 8,222,109
Granted Patent B2
US 8,222,109 · App. 12/760,152 · Granted Jul 17, 2012

Method of fabricating semiconductor device

Assignee: Renesas Electronics Corporation
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Quick Facts
Patent No.
US 8,222,109
App. No.
12/760,152
Granted
Jul 17, 2012
Kind
B2
Abstract

A method of fabricating a semiconductor device according to the present invention includes forming a first trench and a second trench by etching the first trench further, in an epitaxial layer formed over a substrate, extending a width of the second trench, forming an oxidize film by oxidizing the extended second trench, and filling an electrode material in the first trench and the second trench including the oxidized film formed therein. The method of fabricating a semiconductor device according to the present invention enables to fabricate a semiconductor device that improves the withstand voltage between a drain and a source and reduce the on-resistance.

Claims (13)

1. A method of fabricating a semiconductor device comprising:

forming a first trench and a second trench by etching beneath the first trench, in an epitaxial layer formed over a substrate;

extending a width of the second trench;

forming a field oxide film by oxidizing the extended second trench;

forming a gate oxide film by oxidizing the first trench; and

filling an electrode material in the first trench and the second trench after forming the field oxide in the extended second trench and forming the gate oxide in the first trench,

wherein the gate oxide film formed in the first trench is thinner than the field oxide film formed in the extended second trench.

2. The method according to claim 1 , wherein the width of the second trench is extended by forming a sacrificial oxidize film in the second trench by oxidizing the second trench, and by removing the sacrificial oxidize film formed in the second trench.

3. The method according to claim 1 , wherein the width of the second trench is extended by isotropic etching after forming the second trench.

4. The method according to claim 3 , wherein the isotropic etching is chemical dry etching.

5. The method according to claim 1 , wherein the second trench is formed by etching beneath the first trench after forming a nitride film to a side surface of the first trench.

6. The method according to claim 1 , further comprising forming a source region in each region between the first trench of the epitaxial layer.

7. The method according to claim 1 , further comprising depositing an interlayer dielectric film inside the first trench after filling an electrode material in the first trench and the second trench.

Assignments (3)
CHANGE OF ADDRESS Recorded Nov 29, 2017
From: RENESAS ELECTRONICS CORPORATION
To: RENESAS ELECTRONICS CORPORATION
Reel/Frame 044928/0001 →
CHANGE OF NAME Recorded Oct 26, 2010
From: NEC ELECTRONICS CORPORATION
To: RENESAS ELECTRONICS CORPORATION
Reel/Frame 025191/0985 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 16, 2010
From: YAMAMOTO, HIDEO; TAKEHARA, KEI
To: NEC ELECTRONICS CORPORATION
Reel/Frame 024246/0809 →
Priority Claims (1)
JP 2009-107347 · Apr 27, 2009 · national
Continuity (1)
Related Publication 20100273304A1 · Oct 28, 2010