Semiconductor device and method of fabricating the same
A semiconductor device includes an isolation layer defining an active region formed in a semiconductor substrate. A first recessing process is performed on the isolation layer to expose edge portions of the active region. A first rounding process is performed to round the edge portions of the active region. A second recessing process is performed on the isolation layer. A second rounding process is performed to round the edge portions of the active region.
1. A semiconductor device comprising:
an isolation layer recessed from a surface of a semiconductor substrate;
an active region of the semiconductor substrate defined by the isolation layer, wherein the isolation layer is substantially planar at the active region; and
a finfet gate structure disposed on the active region, the active region protruding upward with respect to the isolation layer, wherein a side surface of the active region has a bend point adjacent to a top surface of the isolation layer.
2. The semiconductor device of claim 1 , wherein a curvature radius of edge portions of the active region is in the range from about ⅓ to about ½ of a width of an upper portion of the active region.
3. The semiconductor device of claim 1 , wherein a curvature radius of edge portions of the active region is about ½ of a width of an upper portion of the active region.
4. The semiconductor device of claim 1 , wherein a width of the active region increases in a direction toward the isolation layer.
5. The semiconductor device of claim 1 , wherein a slope of the side surface changes at the bend point of the side surface, wherein the bend point separates two substantially planar portions of the side surface.
6. The semiconductor device of claim 1 , wherein a first slope of the side surface of the active region protruding upward with respect to the isolation layer changes from a second slope of the side surface of the active region defined by the isolation layer at the bend point of the side surface.
7. A semiconductor device comprising:
an isolation layer recessed from a surface of a semiconductor substrate;
an active region of the semiconductor substrate defined by the isolation layer, the active region protruding upward with respect to the isolation layer,
wherein the active region includes a top surface and a side surface that has a first bend point adjacent to a top surface of the isolation layer.
8. The semiconductor device of claim 7 , further comprising a finfet gate structure disposed on the active region.
9. The semiconductor device of claim 7 , wherein the top surface of the active region has a round shape.
10. The semiconductor device of claim 7 , wherein the active region further comprises a second bend point between the top surface of the active region and the side surface of the active region.
11. The semiconductor device of claim 7 , wherein the side surface of the active region comprises a first side surface on the first bend point and a second side surface under the first bend point.
12. The semiconductor device of claim 7 , wherein the first side surface and the second side surface have different slopes.
13. The semiconductor device of claim 7 , wherein the side surface of the active region comprises a first side surface upward from the isolation layer and a second side surface downward from the isolation layer, and
wherein the first bend point is disposed between the first side surface and the second side surface.
14. The semiconductor device of claim 7 , wherein a width of the active region increases in a direction toward the isolation layer.
15. The semiconductor device of claim 7 , wherein a slope of the side surface changes at the first bend point of the side surface.
16. The semiconductor device of claim 7 , wherein a first slope of the side surface of the active region protruding upward with respect to the isolation layer changes from a second slope of the side surface of the active region defined by the isolation layer at the first bend point of the side surface.
17. The semiconductor device of claim 7 , wherein the first bend point separates two substantially planar portions of the side surface.
18. A semiconductor device comprising:
an isolation layer recessed from a surface of a semiconductor substrate;
an active region of the semiconductor substrate defined by the isolation layer; and
a finfet gate structure disposed on the active region, the active region protruding upward with respect to the isolation layer, wherein a side surface of the active region has a first bend point adjacent to a top surface of the isolation layer,
wherein a first slope of the side surface of the active region protruding upward with respect to the isolation layer changes from a second slope of the side surface of the active region defined by the isolation layer at the bend point of the side surface.