IP Library › Granted Patent US 8,266,558
Granted Patent B2
US 8,266,558 · App. 12/498,951 · Granted Sep 11, 2012

Methods for forming arrays of small, closely spaced features

Assignee: Micron Technology, Inc.
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Quick Facts
Patent No.
US 8,266,558
App. No.
12/498,951
Granted
Sep 11, 2012
Kind
B2
Abstract

Methods of forming arrays of small, densely spaced holes or pillars for use in integrated circuits are disclosed. Various pattern transfer and etching steps can be used, in combination with pitch-reduction techniques, to create densely-packed features. Conventional photolithography steps can be used in combination with pitch-reduction techniques to form superimposed patterns of crossing elongate features with pillars at the intersections. Spacers are simultaneously applied to sidewalls of both sets of crossing lines to produce a pitch-doubled grid pattern. The pillars facilitate rows of spacers bridging columns of spacers.

Claims (10)

1. An array of features for computer memory fabrication, comprising:

a middle tier comprising a grid with crossing grid lines extending on a same level, holes between the grid lines, and grid line intersections where the grid lines cross, the grid lines having sidewalls;

a lower tier comprising a surface upon which the grid is positioned, the holes extending to the lower tier; and

a higher tier comprising pillars positioned on the grid at the grid line intersections, the pillars having sidewalls and substantially localized at the grid line intersections.

2. The array of claim 1 , further comprising spacer material adhered to the sidewalls of the grid lines and the sidewalls of the pillars.

3. The array of claim 2 , wherein the spacer material forms continuous spacer lines, each spacer line serially and alternatingly adhering to sidewalls of grid lines and to sidewalls of pillars and extending along the length of each of the grid lines.

4. The array of claim 2 , wherein the spacer material forms continuous undulating spacer lines that adhere to the sidewalls of the grid lines and to the sides of the pillars, wherein the spacer material defines sides of the holes between the grid lines.

5. The array of claim 2 , wherein the spacer material forms a spacer grid having crossing spacer lines that adhere to the grid lines and bridge across the crossing grid lines by adhering to the pillar sidewalls.

6. The array of claim 1 , wherein the grid and the pillars comprise the same material.

7. The array of claim 1 , wherein the grid and the pillars comprise amorphous carbon.

Assignments (7)
RELEASE OF SECURITY INTEREST Recorded Nov 12, 2019
From: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.; MICRON SEMICONDUCTOR PRODUCTS, INC.
Reel/Frame 051028/0001 →
RELEASE OF SECURITY INTEREST Recorded Oct 9, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.
Reel/Frame 050937/0001 →
RELEASE OF SECURITY INTEREST Recorded Aug 23, 2018
From: U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.
Reel/Frame 047243/0001 →
SECURITY INTEREST Recorded Jul 13, 2018
From: MICRON TECHNOLOGY, INC.; MICRON SEMICONDUCTOR PRODUCTS, INC.
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 047540/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REPLACE ERRONEOUSLY FILED PATENT #7358718 WITH THE CORRECT PATENT #7358178 PREVIOUSLY RECORDED ON REEL 038669 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY INTEREST. Recorded Jun 8, 2017
From: MICRON TECHNOLOGY, INC.
To: U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT
Reel/Frame 043079/0001 →
PATENT SECURITY AGREEMENT Recorded Jun 2, 2016
From: MICRON TECHNOLOGY, INC.
To: MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL AGENT
Reel/Frame 038954/0001 →
SECURITY INTEREST Recorded May 12, 2016
From: MICRON TECHNOLOGY, INC.
To: U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT
Reel/Frame 038669/0001 →
Continuity (2)
Division 11217270 · Sep 1, 2005
Related Publication 20090271758A1 · Oct 29, 2009