Semiconductor device and method of manufacturing the same
View Patent ↗A semiconductor device with high reliability and operation performance is manufactured without increasing the number of manufacture steps. A gate electrode has a laminate structure. A TFT having a low concentration impurity region that overlaps the gate electrode or a TFT having a low concentration impurity region that does not overlap the gate electrode is chosen for a circuit in accordance with the function of the circuit.
1. A method for manufacturing a semiconductor device, comprising the steps of:
forming a first semiconductor layer and a second semiconductor layer over a substrate;
forming an insulating film over the first semiconductor layer and the second semiconductor layer;
forming a conductive film over the insulating film;
etching the conductive film and the insulating film to form a first gate electrode and a second gate electrode having a different width from each other, and to form a gate insulating film having a tapered portion over the first semiconductor layer and the second semiconductor layer;
forming an interlayer insulating film over the first gate electrode and the second gate electrode; and
forming a wiring over the interlayer insulating film, the wiring electrically connecting the first semiconductor layer and the second semiconductor layer.
2. The method for manufacturing a semiconductor device according to claim 1 , wherein the first gate electrode has a tapered portion, and the second gate electrode does not have a tapered portion.
3. The method for manufacturing a semiconductor device according to claim 1 , wherein each of the first gate electrode and the second gate electrode includes TaN and W.
4. The method for manufacturing a semiconductor device according to claim 1 , wherein the interlayer insulating film includes SiON and acrylic resin.
5. The method for manufacturing a semiconductor device according to claim 1 , wherein the etching step is conducted by an inductively coupled plasma etching.
6. A method for manufacturing a semiconductor device, comprising the steps of:
forming a first semiconductor layer and a second semiconductor layer over a substrate;
forming an insulating film over the first semiconductor layer and the second semiconductor layer;
forming a conductive film over the insulating film;
first etching the conductive film and the insulating film to form a first gate electrode and a second gate electrode, and to form a gate insulating film having a tapered portion over the first semiconductor layer and the second semiconductor layer;
second etching the second gate electrode so as to have a smaller width than the first gate electrode;
forming an interlayer insulating film over the first gate electrode and the second gate electrode; and
forming a wiring over the interlayer insulating film, the wiring electrically connecting the first semiconductor layer and the second semiconductor layer.
7. The method for manufacturing a semiconductor device according to claim 6 , wherein the first gate electrode has a tapered portion, and the second gate electrode does not have a tapered portion.
8. The method for manufacturing a semiconductor device according to claim 6 , wherein each of the first gate electrode and the second gate electrode includes TaN and W.
9. The method for manufacturing a semiconductor device according to claim 6 , wherein the interlayer insulating film includes SiON and acrylic resin.
10. The method for manufacturing a semiconductor device according to claim 6 , wherein the first etching step is conducted by an inductively coupled plasma etching.
11. A method for manufacturing a semiconductor device, comprising the steps of:
forming a first semiconductor layer and a second semiconductor layer over a substrate;
forming an insulating film over the first semiconductor layer and the second semiconductor layer;
forming a conductive film over the insulating film;
first etching the conductive film and the insulating film to form a first gate electrode and a second gate electrode, and to form a gate insulating film having a tapered portion over the first semiconductor layer and the second semiconductor layer;
doping a first impurity element imparting n-type conductivity into the first semiconductor layer;
second etching the second gate electrode so as to have a smaller width than the first gate electrode;
doping a second impurity element imparting p-type conductivity into the second semiconductor layer;
forming an interlayer insulating film over the first gate electrode and the second gate electrode; and
forming a wiring over the interlayer insulating film, the wiring electrically connecting the first semiconductor layer and the second semiconductor layer.
12. The method for manufacturing a semiconductor device according to claim 11 , wherein the first gate electrode has a tapered portion, and the second gate electrode does not have a tapered portion.
13. The method for manufacturing a semiconductor device according to claim 11 , wherein each of the first gate electrode and the second gate electrode includes TaN and W.
14. The method for manufacturing a semiconductor device according to claim 11 , wherein the interlayer insulating film includes SiON and acrylic resin.
15. The method for manufacturing a semiconductor device according to claim 11 , wherein the first etching step is conducted by an inductively coupled plasma etching.