IP Library › Granted Patent US 8,282,842
Granted Patent B2
US 8,282,842 · App. 11/946,875 · Granted Oct 9, 2012

Cleaning method following opening etch

Assignee: United Microelectronics Corp.
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Quick Facts
Patent No.
US 8,282,842
App. No.
11/946,875
Granted
Oct 9, 2012
Kind
B2
Abstract

A cleaning method following an opening etching is provided. First, a semiconductor substrate having a dielectric layer is provided. The hard mask layer includes at least a metal layer. The opening etch is then carried out to form at least an opening in the dielectric layer. A nitrogen (N2) treatment process is performed to clean polymer residues having carbon-fluorine (C—F) bonds remained in the opening. Finally, a wet cleaning process is performed.

Claims (30)

1. A cleaning method following an opening etch, comprising:

providing a substrate having a dielectric layer formed with a low-k material;

performing the opening etch to form at least an opening in the dielectric layer;

performing a nitrogen treatment process to clean polymer residues having carbon-fluorine (C—F) bonds remained and disposed at two sidewalls and the bottom of the opening by using only nitrogen gas or a noble gas; and

performing a wet cleaning process.

2. The method of claim 1 , further comprises forming a hard mask layer on the dielectric layer after forming the dielectric layer, and the dielectric layer comprises at least a metal layer.

3. The method of claim 2 , wherein the hard mask layer is a composite layer, which comprises a silicon carbide (SiC) layer, the metal layer, and a plasma enhanced oxide (PEOX) layer from bottom to top.

4. The method of claim 2 , wherein the metal layer comprises titanium nitride (TiN) or tantalum nitride (TaN).

5. The method of claim 2 , metal residues having carbon-carbon (C—C) bonds are formed remaining in the opening during the opening etch.

6. The method of claim 5 , wherein the nitrogen treatment process provides a nitrogen plasma, which comprises nitrogen radicals, nitrogen ions, and nitrogen atoms, to reactive with the metal residues having carbon-carbon (C—C) bonds, so as to form HxCyNz compounds.

7. The method of claim 1 , wherein the nitrogen treatment process and the opening etch are performed in a same reaction chamber continuously.

8. The method of claim 1 , wherein nitrogen is used as a cleaning gas in the nitrogen treatment process.

9. The method of claim 8 , wherein the nitrogen treatment process provides a nitrogen plasma, which comprises nitrogen radicals, nitrogen ions, and nitrogen atoms, to replace a portion of the fluorine atoms in the polymer residues having carbon-fluorine (C—F) bonds to form volatile products having carbon-nitrogen (C—N) bonds.

10. The method of claim 9 , wherein the nitrogen treatment process has a gas flow of about 700 to 1300 standard cubic centimeters per minute (sccm); a chamber pressure of about 150 to 250 mtorr; a power of 200 watt (W) generated by a 27 megahertz (MHZ) radio frequency generator; and a reaction time of about 30 seconds.

11. The method of claim 1 , wherein the noble gas comprises at least one of Helium or Neon.

12. The method of claim 1 , wherein the wet cleaning process comprises dipping the semiconductor substrate comprising the opening in a diluted hydrofluoric acid solution with a concentration of about 2.5 parts per million (ppm) for about 1 to 5 minutes.

13. The method of claim 1 , wherein the opening is a dual damascene opening.

14. The method of claim 13 , wherein the semiconductor substrate further comprising:

a bottom dielectric layer disposed between the semiconductor substrate and the dielectric layer;

a conductive layer positioned within the bottom dielectric layer;

a first bottom anti-reflection coating (BARC) disposed on the hard mask layer; and

a first photoresist layer having a trench pattern exposing a portion of the first BARC disposed on the first BARC.

15. The method of claim 14 , wherein the method of forming the opening further comprising:

performing a first etching process to etch the first BARC and the hard mask layer through the trench pattern to form a trench recess within the hard mask layer;

removing the first photoresist layer and the first BARC;

forming a second BARC and a second photoresist layer, wherein the second BARC fills the trench recess and the second photoresist layer comprises a via pattern exposing a portion of the second BARC;

performing a second etching process to etch the second BARC, the hard mask layer and a portion of the dielectric layer through the via pattern to form a via recess in the dielectric layer;

removing the second photoresist layer and the second BARC; and

performing a third etching process to etch the dielectric layer through the via recess and the trench recess until the conductive layer is exposed.

16. The method of claim 1 , wherein the opening is a plug hole.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 29, 2007
From: WANG, CHIEH-JU; YAU, JYH-CHERNG; LAI, YU-TSUNG; LIAO, JIUNN-HSIUNG
To: UNITED MICROELECTRONICS CORP.
Reel/Frame 020172/0763 →
Continuity (1)
Related Publication 20090142931A1 · Jun 4, 2009