Conformal films on semiconductor substrates
A layer of diffusion barrier or seed material is deposited on a semiconductor substrate having a recessed feature. The method may include a series of new deposition cycles, for example, a first net deposition cycle and a second net deposition cycle. The first net deposition cycle includes depositing a first deposited amount of the diffusion barrier or seed material and etching a first etched amount of the diffusion barrier or seed material. The second net deposition cycle including depositing a second deposited amount of the diffusion barrier or seed material and etching a second etched amount of the diffusion barrier or seed material. At least one of the process parameters of the first cycle differs from that of the second allows providing a graded deposition effects to reduce a risk of damaging any under layers and dielectric. A deposited layer of diffusion barrier or seed material is generally more conformal.
1. A method for depositing a layer of diffusion barrier or seed material on a semiconductor substrate having a recessed feature, the method comprising:
performing a first net deposition cycle including
depositing a first deposited layer of the diffusion barrier or seed material and
etching the first deposited layer to form a first etched layer having a first net deposited thickness; and
performing a second net deposition cycle including
depositing a second deposited layer of the diffusion barrier or seed material the first etched layer and
etching the second deposited layer to form a second etched layer over the first etched layer, the second etched layer having a second net deposited thickness, wherein the first net deposited thickness is greater than the second net deposited thickness and wherein no etching bias is applied to the semiconductor substrate during etching of the first deposited layer and wherein an etching bias is applied during etching of the second deposited layer.
2. The method of claim 1 , wherein the thickness of the first deposited layer is between about 2 and 100 Angstroms and the thickness of the second deposited layer is between about 2 and 50 Angstroms.
3. The method of claim 1 comprising between about 2 and 20 net deposition cycles.
4. The method of claim 1 , further comprising a third net deposition cycle including depositing a third deposited layer of the diffusion barrier or seed material, wherein the thickness of the third deposited layer is different than the thickness of the first deposited layer and different than the thickness of the second deposited layer.
5. The method of claim 1 , wherein a thickness difference between the first etched layer and the first deposited layer is approximately the same as a thickness difference between the second etched layer and the second deposited layer.
6. The method of claim 1 , wherein a thickness difference between the first etched layer and the first deposited layer is less than a thickness difference between the second etched layer and the second deposited layer.
7. The method of claim 1 , wherein the first deposited layer is thicker than the second deposited layer.
8. The method of claim 1 , wherein etching during the first net deposition cycle is performed at a first etching etch rate to deposition rate (E/D) ratio and etching during the second net deposition cycle is performed at a second etching E/D ratio, and wherein the first etching E/D ratio is different than the second etching E/D ratio.
9. The method of claim 8 , wherein the first etching E/D ratio is between about 0 and 2 and the second etching E/D ratio is between about 0 and 6.
10. The method of claim 1 , wherein the first net deposition cycle and the second net deposition cycle are performed in a plasma vapor deposition (PVD) process chamber.
11. The method of claim 1 , wherein the first net deposition cycle and the second net deposition cycle are performed in a process chamber comprising a hollow cathode magnetron.
12. The method of claim 1 , wherein the diffusion barrier or seed material comprises a material selected from the group consisting of Ta, TaN x , Ti, TiN x , W, WN x , Ru, Mn, and Co.
13. The method of claim 1 , wherein the diffusion barrier or seed material comprises a material selected from the group consisting of copper, manganese, aluminum, and alloys of those metals.
14. The method of claim 1 , wherein the first net deposition cycle and the second net deposition cycle are performed in a plasma vapor deposition (PVD) process chamber.
15. A method for depositing a layer of diffusion barrier or seed material on a semiconductor substrate having a recessed feature, the method comprising:
performing a first net deposition cycle including
depositing a first deposited layer of the diffusion barrier or seed material and
etching the first deposited layer to form a first etched layer having a first net deposited thickness; and
performing a second net deposition cycle including
depositing a second deposited layer of the diffusion barrier or seed material the first etched layer and
etching the second deposited layer to form a second etched layer over the first etched layer, the second etched layer having a second net deposited thickness, wherein the first net deposited thickness is greater than the second net deposited thickness and wherein the diffusion barrier or seed material comprises a material selected from the group consisting of copper, manganese, aluminum, and alloys of those metals.
16. The method of claim 15 , wherein the thickness of the first deposited layer is between about 2 and 100 Angstroms and the thickness of the second deposited layer is between about 2 and 50 Angstroms.
17. The method of claim 15 , further comprising a third net deposition cycle including depositing a third deposited layer of the diffusion barrier or seed material, wherein the thickness of the third deposited layer is different than the thickness of the first deposited layer and different than the thickness of the second deposited layer.
18. The method of claim 15 , wherein the first deposited layer is thicker than the second deposited layer.
19. The method of claim 15 , wherein a first etching bias is applied to the semiconductor substrate during etching of the first deposited layer and a second etching bias is applied during etching of the second deposited layer, and wherein the first etching bias is less than the second etching bias.