Semiconductor device, semiconductor wafer and manufacturing method of the same
In a state where an adhesive tape is attached onto a main surface of a semiconductor wafer, a trench is formed in a rear surface of the semiconductor wafer. For forming the trench in the rear surface of the semiconductor wafer, after coating a resist film on the rear surface of the semiconductor wafer, the resist film is patterned by using the photolithography technology. The patterning of the resist film is performed so as not to leave the resist film in the region where the trench is to be formed. Then, the trench is formed in a predetermined region of the semiconductor wafer by the dry etching technology using the patterned resist film as a mask. Specifically, the trench is formed in the region near the dicing line.
1. A semiconductor device comprising:
a rectangular semiconductor chip,
wherein the semiconductor chip includes:
(a) a semiconductor substrate; and
(b) a plurality of protruding bump electrodes formed on an element forming surface of the semiconductor substrate,
wherein the semiconductor chip has an edge region and an inner region,
wherein the protruding bump electrodes are formed in the inner region of the semiconductor chip in planar view and are formed on a top surface of the semiconductor substrate,
wherein a trench is formed in the edge region of the semiconductor chip in a planar view and is formed on a rear surface of the semiconductor substrate, and
wherein a thickness in the edge region of the semiconductor chip is smaller than a thickness in the inner region of the semiconductor chip.
2. The semiconductor device according to claim 1 , wherein a remainder from the thickness in the edge region of the semiconductor chip to the thickness in the inner region of the semiconductor chip is a 5 μm or more.
3. The semiconductor device according to claim 1 , wherein the thickness in the inner region of the semiconductor chip is 200 μm or less.
4. A semiconductor device comprising:
a rectangular semiconductor chip,
wherein the semiconductor chip includes:
(a) a semiconductor substrate;
(b) a semiconductor element formed on the semiconductor substrate;
(c) a multilayer wiring formed on the semiconductor element;
(d) a pad formed in a top layer of the multilayer wiring;
(e) a resin film having an opening on the pad;
(f) a rewiring filled in the opening to be electrically connected to the pad and extending on the resin film; and
(g) a protruding bump electrode formed on one end of the rewiring which is electrically connected to the pad at the other end thereof,
wherein the semiconductor chip has an edge region and an inner region,
wherein the protruding bump electrodes are formed in the inner region of the individual chip region in planar view and are formed on a top surface of the semiconductor substrate,
wherein a trench is formed in the edge region of the individual chip region in planar view and is formed on a rear surface of the semiconductor substrate, and
wherein a thickness in the edge region of the semiconductor chip is smaller than a thickness in the inner region of the semiconductor chip.
5. A semiconductor wafer comprising:
a plurality of chip regions partitioned by dicing lines,
wherein each of the plurality of chip regions includes:
(a) a semiconductor substrate; and
(b) a plurality of protruding bump electrodes formed on an element forming surface of the semiconductor substrate,
wherein each of the plurality of chip regions has an edge region and an inner region,
wherein the protruding bump electrodes are formed in the inner region of the individual chip region in planar view and are formed on a top surface of the semiconductor substrate,
wherein a trench is formed in the edge region of the individual chip region in planar view and is formed on a rear surface of the semiconductor substrate, and
wherein a thickness in the edge region of the individual chip region is smaller than a thickness in the inner region of the individual chip region.
6. The semiconductor wafer according to claim 5 , wherein a remainder from the thickness in the edge region of the individual chip region to the thickness in the inner region of the individual chip region is 5 μm or more.
7. The semiconductor wafer according to claim 5 , wherein the thickness in the inner region of the individual chip region is 200 μm or less.
8. A semiconductor wafer comprising:
a plurality of chip regions partitioned by dicing lines,
each of the plurality of chip regions including:
(a) a semiconductor substrate;
(b) a semiconductor element formed on the semiconductor substrate;
(c) a multilayer wiring formed on the semiconductor element;
(d) a pad formed in a top layer of the multilayer wiring;
(e) a resin film having an opening on the pad;
(f) a rewiring filled in the opening to be electrically connected to the pad and extending on the resin film; and
(g) a protruding bump electrode formed on one end of the rewiring which is electrically connected to the pad at the other end thereof, and
each of the plurality of chip regions having an edge region and an inner region,
wherein the protruding bump electrodes are formed in the inner region of the individual chip region in planar view and are formed on a top surface of the semiconductor substrate,
wherein a trench is formed in the edge region of the individual chip region in planar view and is formed on a rear surface of the semiconductor substrate, and
wherein a thickness in the edge region of the individual chip region is smaller than a thickness in the inner region of the individual chip region.