Method for forming a CMOS image sensing pixel
View Patent ↗A method for forming a CMOS image sensing pixel, which is configured to determine a color, includes providing an n-type substrate that includes a first thickness and a first width. The method also includes forming a p-type layer, the p-type layer overlaying the n-type substrate. The p-type layer includes a second thickness and a second width. The second thickness and the second width are associated with a light characteristic. The method additionally includes forming an n-type layer, the n-type layer overlaying the p-type layer. The n-type layer includes a third thickness and a third width. In addition, the method includes forming a pn junction between the p-type layer and the n-type layer. The pn junction includes a fourth width. The method also includes providing a control circuit. The control circuit is electrically coupled to the n-type substrate.
1. A method for forming a CMOS image sensing pixel, the CMOS image sensing pixel being configured for determining a color, the method comprising:
providing an n-type substrate, the n-type substrate including a first thickness and a first width;
forming a p-type epitaxy layer, the p-type layer overlaying the n-type substrate, the p-type epitaxy layer including a second thickness and a second width, the second thickness and the second width being associated with a light characteristic;
forming an n-type layer, the n-type layer overlaying the p-type epitaxy layer, the n-type layer including a third thickness and a third width;
forming a pn junction between the p-type epitaxy layer and the n-type layer, the pn junction including a fourth width; and
providing a control circuit, the control circuit being electrically coupled to the n-type substrate.
2. The method of claim 1 further comprising forming an epitaxy layer between the n-type substrate and the p-type epitaxy layer.
3. The method of claim 2 , wherein the epitaxy layer includes a silicon germanium material.
4. The method of claim 3 , wherein the silicon germanium material is characterized by a thickness ranging from 0.1 um to 1 um.
5. The method of claim 3 , wherein the silicon germanium material is characterized by a thickness, the thickness being associated with a doping concentration.
6. The method of claim 1 , wherein the n-type substrate includes a silicon material.
7. The method of claim 1 , wherein the second thickness ranges from about 2 um to about 7 um.
8. The method of claim 1 , wherein the second width is associated with a quantum efficiency.
9. The method of claim 8 , wherein the quantum efficiency is associated with a color light component.
10. A method for forming a CMOS image sensing pixel, the CMOS image sensing pixel being configured for determining a color, the method comprising:
providing an n-type substrate, the n-type substrate including a first thickness and a first width;
forming a p-type epitaxy layer, the p-type layer overlaying the n-type substrate, the p-type epitaxy layer including a second thickness and a second width, the second thickness and the second width being associated with a light characteristic;
forming an n-type layer, the n-type layer overlaying the p-type epitaxy layer, the n-type layer including a third thickness and a third width;
forming a pn junction between the p-type epitaxy layer and the n-type layer, the pn junction including a fourth width; and
providing a control circuit, the control circuit being electrically coupled to the n-type substrate;
wherein the light characteristic comprises:
a first color light component;
a second color light component; and
a third color light component.
11. A method for forming a CMOS image sensing pixel, the CMOS image sensing pixel being configured for determining a color, the method comprising:
providing an n-type substrate, the n-type substrate including a first thickness and a first width;
forming a p-type epitaxy layer, the p-type layer overlaying the n-type substrate, the p-type epitaxy layer including a second thickness and a second width, the second thickness and the second width being associated with a light characteristic;
forming an n-type layer, the n-type layer overlaying the p-type epitaxy layer, the n-type layer including a third thickness and a third width;
forming a pn junction between the p-type epitaxy layer and the n-type layer, the pn junction including a fourth width; and
providing a control circuit, the control circuit being electrically coupled to the n-type substrate;
wherein the control circuit comprises:
a voltage source having a first voltage, a second voltage, and a third voltage.
12. The method of claim 11 , wherein:
the first voltage is applied to the n-type substrate for obtaining a first output signal;
the second voltage is applied to the n-type substrate for obtaining a second output signal; and
the third voltage is applied to the n-type substrate for obtaining a third output signal.
13. The method of claim 12 , wherein the first output signal is associated with a blue color component.
14. The method of claim 11 , wherein:
the first voltage is higher than the second voltage; and
the second voltage is higher than the third voltage.
15. The method of claim 14 , wherein the third voltage is zero volt.
16. The method of claim 13 , wherein:
the second output signal is associated with the blue color component and a green color component; and
the third output signal is associated with the blue color component, the green color component, and a red color component.