IP Library Granted Patent US 8,431,469
Granted Patent B2
US 8,431,469 · App. 13/022,522 · Granted Apr 30, 2013

Method for depinning the Fermi level of a semiconductor at an electrical junction and devices incorporating such junctions

Inventors: Daniel E. Grupp (Palo Alto, CA); Daniel J. Connelly (Redwood City, CA)
Assignee: Acorn Technologies, Inc.
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Quick Facts
Patent No.
US 8,431,469
App. No.
13/022,522
Granted
Apr 30, 2013
Kind
B2
Abstract

An electrical device in which an interface layer is disposed between and in contact with a metal and a Si-based semiconductor, the interface layer being of a thickness effective to depin of the Fermi level of the semiconductor while still permitting current to flow between the metal and the semiconductor. The interface layer may include a layer of a passivating material (e.g., made from nitrogen, oxygen, oxynitride, arsenic, hydrogen and/or fluorine) and sometimes also includes a separation layer. In some cases, the interface layer may be a monolayer of a semiconductor passivating material. The interface layer thickness corresponds to a minimum specific contact resistance of less than or equal to 10 Ω-μm 2 or even less than or equal to 1 Ω-μm 2 for the electrical device.

Claims (2)

1. A method, comprising cleaning a semiconductor substrate with a cleaning solution to form a cleaned substrate; immersing, for a period of time between several seconds and approximately five (5) minutes, the cleaned substrate in a solution containing hydrogen and fluorine ions of between approximately 1%-50% by weight; removing the substrate from the solution and blow-drying the substrate with nitrogen, thereby forming an interface layer containing hydrogen and fluorine on the semiconductor substrate, said interface layer being of sufficient thickness to passivate a surface of said semiconductor substrate in a vicinity of said interface layer; subsequently depositing a metal layer over the interface layer through thermal evaporation of a source, thereby forming a junction having a metal layer disposed over the interface layer disposed over the semiconductor, said junction having a specific contact resistance of less than or equal to approximately 1000 Ω-μm 2 .

2. The method of claim 1 , wherein following removal of the substrate from the solution and prior to blow-drying the substrate with nitrogen, rinsing the substrate in deionized water for less than 30 sec.

Assignments (5)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 26, 2024
From: ACORN SEMI, LLC
To: OAK IP, LLC
Reel/Frame 069681/0837 →
RELEASE OF SECURITY INTEREST Recorded Dec 26, 2024
From: THE PETER NORTON LIVING TRUST
To: ACORN SEMI, LLC
Reel/Frame 069792/0173 →
RELEASE OF SECURITY INTEREST Recorded Dec 26, 2024
From: THE PETER NORTON LIVING TRUST
To: ACORN TECHNOLOGIES, INC.
Reel/Frame 069792/0208 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 26, 2019
From: ACORN TECHNOLOGIES, INC.
To: ACORN SEMI, LLC
Reel/Frame 049602/0324 →
SECURITY INTEREST Recorded May 30, 2019
From: ACORN SEMI LLC
To: THE PETER NORTON LIVING TRUST DATED APRIL 28, 1989,
Reel/Frame 049320/0634 →
Continuity (4)
Division 12197996 · Aug 25, 2008
Division 11181217 · Jul 13, 2005
Continuation 10217758 · Aug 12, 2002
Related Publication 20110169124A1 · Jul 14, 2011