IP Library › Granted Patent US 8,436,478
Granted Patent B2
US 8,436,478 · App. 12/827,476 · Granted May 7, 2013

Methods of fluxless micro-piercing of solder balls, and resulting devices

Inventor: Teck Kheng Lee (Singapore, SG)
Assignee: Micron Technology, Inc.
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Quick Facts
Patent No.
US 8,436,478
App. No.
12/827,476
Granted
May 7, 2013
Kind
B2
Abstract

A method is disclosed which includes forming a layer of conductive material above a substrate, forming a masking layer above the layer of conductive material, performing a first etching process on the layer of conductive material with the masking layer in place, removing the masking layer and, after removing the masking layer, performing an isotropic etching process on the layer of conductive material to thereby define a plurality of piercing bond structures positioned on the substrate.

Claims (28)

1. A device, comprising:

an integrated circuit die having a plurality of solder balls that are conductively coupled to bond pads on the die, each of the solder balls having a layer of oxide on an outer surface thereof; and

a substrate comprising a plurality of piercing bond structures, each of the piercing bond structures penetrating and extending at least partially into a corresponding solder ball to thereby establish a conductive connection between the solder ball and the piercing bond structure, the piercing bond structure penetrating the layer of oxide.

2. The device of claim 1 , wherein the piercing bond structures have a non-flat end.

3. The device of claim 1 , wherein each of the piercing bond structures comprises at least one anti-oxidation layer formed on an outer surface of the piercing bond structure.

4. The device of claim 3 , wherein the at least one anti-oxidation layer comprises a plurality of layers of material.

5. The device of claim 4 , wherein the plurality of layers comprises a layer comprising gold formed on an exposed surface of the piercing bond structure and a layer comprising nickel formed on the layer comprising gold.

6. The device of claim 1 , wherein the plurality of piercing bond structures has a substantially triangular cross-sectional configuration.

7. An integrated circuit device, comprising:

a first component configured to be conductively coupled to a first solder ball and a second solder ball, the first solder ball having a first layer of oxide, the second solder ball having a second layer of oxide, wherein the first solder ball is larger than the second solder ball; and

a second component configured to have a first piercing bond structure and a second piercing bond structure,

wherein the first piercing bond structure penetrates the first layer of oxide and extends at least partially into the first solder ball to establish a first conductive connection, and

wherein the second piercing bond structure penetrates the second layer of oxide and extends at least partially into the second solder ball to establish a second conductive connection.

8. The device of claim 7 , wherein the first piercing bond structure includes a non-flat end, and wherein at least one anti-oxidation layer is formed on an outer surface of the first piercing bond structure.

9. The device of claim 8 , wherein the at least one anti-oxidation layer comprises a plurality of layers of material, and wherein the plurality of layers comprises a layer comprising gold formed on an exposed surface of the first piercing bond structure and a layer comprising nickel formed on the layer comprising gold.

10. The device of claim 7 , wherein the second piercing bond structure includes a non-flat end, and wherein at least one anti-oxidation layer is formed on an outer surface of the second piercing bond structure.

11. The device of claim 10 , wherein the at least one anti-oxidation layer comprises a plurality of layers of material, and wherein the plurality of layers comprises a layer comprising gold formed on an exposed surface of the second piercing bond structure and a layer comprising nickel formed on the layer comprising gold.

12. The device of claim 7 , wherein the first piercing bond structure and the second piercing bond structure respectively have a substantially triangular cross-sectional configuration.

13. The device of claim 7 , wherein the first piercing bond structure and the second piercing bond structure respectively have a substantially pointed end.

14. The device of claim 7 , wherein the first piercing bond structure and the second piercing bond structure respectively have a substantially rounded end.

15. The device of claim 7 , wherein the first piercing bond structure and the second piercing bond structure respectively have an end with multiple peaks.

16. An electronic device including a semiconductor structure, the semiconductor structure comprising:

an integrated circuit component having a plurality of solder balls that are conductively coupled to the integrated circuit, each of the solder balls having a layer of oxide on an outer surface thereof; and

a plurality of piercing bond structures conductively coupled to a plurality of bond pads, each of the piercing bond structures penetrating and extending at least partially into a corresponding solder ball to establish a conductive connection between the integrated circuit and the plurality of bond pads.

17. The device of claim 16 , wherein the plurality of piercing bond structures are positioned on a substrate.

18. The device of claim 16 , wherein each of the plurality of piercing bond structures includes a non-flat end, and wherein at least one anti-oxidation layer is formed on an outer surface of the second piercing bond structure.

19. The device of claim 18 , wherein the at least one anti-oxidation layer comprises a plurality of layers of material, and wherein the plurality of layers comprises a layer comprising gold formed on an exposed surface of the piercing bond structure and a layer comprising nickel formed on the layer comprising gold.

20. The device of claim 16 , wherein the plurality of piercing bond structures respectively have a substantially triangular cross-sectional configuration.

Assignments (7)
RELEASE OF SECURITY INTEREST Recorded Nov 12, 2019
From: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.; MICRON SEMICONDUCTOR PRODUCTS, INC.
Reel/Frame 051028/0001 →
RELEASE OF SECURITY INTEREST Recorded Oct 9, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.
Reel/Frame 050937/0001 →
RELEASE OF SECURITY INTEREST Recorded Aug 23, 2018
From: U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.
Reel/Frame 047243/0001 →
SECURITY INTEREST Recorded Jul 13, 2018
From: MICRON TECHNOLOGY, INC.; MICRON SEMICONDUCTOR PRODUCTS, INC.
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 047540/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REPLACE ERRONEOUSLY FILED PATENT #7358718 WITH THE CORRECT PATENT #7358178 PREVIOUSLY RECORDED ON REEL 038669 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY INTEREST. Recorded Jun 8, 2017
From: MICRON TECHNOLOGY, INC.
To: U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT
Reel/Frame 043079/0001 →
PATENT SECURITY AGREEMENT Recorded Jun 2, 2016
From: MICRON TECHNOLOGY, INC.
To: MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL AGENT
Reel/Frame 038954/0001 →
SECURITY INTEREST Recorded May 12, 2016
From: MICRON TECHNOLOGY, INC.
To: U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT
Reel/Frame 038669/0001 →
Continuity (2)
Division 11958842 · Dec 18, 2007
Related Publication 20100264541A1 · Oct 21, 2010