Via forming method and method of manufacturing multi-chip package using the same

1. A via forming method comprising:

forming via-holes in a substrate;

putting the substrate in a first solution to fill the via-holes with the first solution;

while the substrate is in the first solution, mixing a second solution containing metal particles with the first solution;

sinking the metal particles contained in the mixed first and second solutions into the via-holes; and

before the metal particles have formed vias, performing a first curing process of heat-treating the substrate having the via-holes filled with the metal particles so as to form vias in the via-holes.

2. The method according to claim 1 , wherein said putting the substrate includes keeping the first solution in the via holes for a period of time so that air bubbles inside the via-holes are removed.

3. The method according to claim 1 , wherein the metal particles include any particle selected from a group consisting of copper, silver, gold, and tin.

4. The method according to claim 1 , wherein the second solution has a solvent having a density that is the same as or higher than the first solution, and the first solution contains ethanol, methanol, or isopropyl alcohol.

5. The method according to claim 1 , wherein the first curing process is performed at a temperature that is the same as or higher than the boiling point of the mixture of the first solution and the second solution.

6. The method according to claim 1 , wherein in the mixing, a portion of the metal particles is deposited on a surface of the substrate, the method further comprising before said performing a first curing process, removing the portion of the metal particles by using a squeezer in a state in which the substrate is in the mixture of the first solution and the second solution.

7. The method according to claim 1 , wherein in the mixing, a portion of the metal particles is deposited on a surface of the substrate, the method further comprising removing the portion of metal particles by using a squeezer when sinking the metal particles in a state in which the substrate is in the mixture of the first solution and the second solution.

8. The method according to claim 1 , further comprising:

forming a wiring pattern on the vias by using an imprint process or a print process using a conductive paste; and

performing a second curing process of heat-treating the substrate having the wiring pattern.

9. The method according to claim 8 , wherein:

in the first curing process, the vias are formed to have an uppermost surface thereof to be lower than an uppermost part of the via-holes, and

in the second curing process, a recess is formed in the wiring pattern and on the vias.

10. The method according to claim 1 , further comprising before said forming the via-holes in the substrate, sequentially forming an insulating layer and a diffusion barrier film on inside surfaces of the via-holes.

11. A method of manufacturing a multi-chip package, the method comprising:

forming via-holes in a substrate;

putting the substrate in a first solution to fill the via-holes with the first solution;

while the substrate is in the first solution, mixing a second solution containing metal particles with the first solution;

sinking the metal particles contained in the mixed first and second solutions into the via-holes;

before the metal particles have formed vias, performing a first curing process of heat-treating the substrate having the via-holes filled with the metal particles so as to form vias in the via-holes; and

electrically connecting the lower parts of the via-holes to a wiring board by bumps.

12. The method according to claim 11 , wherein said putting the substrate includes keeping the first solution in the via holes for a period of time so that air bubbles inside the via-holes are removed.

13. The method according to claim 11 , wherein the metal particles includes any particle selected from a group including copper, silver, gold, and tin.

14. The method according to claim 11 , wherein the second solution has a solvent having a density that is the same as or higher than the first solution, and the first solution contains ethanol, methanol, or isopropyl alcohol.

15. The method according to claim 11 , wherein the first curing process is performed at a temperature that is the same as or higher than the boiling point of the mixture of the first solution and the second solution.

16. The method according to claim 11 , wherein in the mixing, a portion of the metal particles is deposited on a surface of the substrate, the method further comprising before said performing a first curing process, removing the portion of the metal particles by using a squeezer in a state in which the substrate is in the mixture of the first solution and the second solution.

17. The method according to claim 11 , further comprising:

forming a re-wiring layer on the vias by using an imprint process or a print process using a conductive paste; and

performing a second curing process of heat-treating the substrate having the re-wiring layer.

18. The method according to claim 17 , wherein in the first curing process, the vias are formed to have an uppermost surface thereof to be lower than an uppermost part of the via-holes, and

in the second curing process, a recess is formed in the re-wiring layer and on the vias.

19. The method according to claim 18 , further comprising:

stacking a semiconductor chip having electronic elements on the substrate; and

electrically connecting the semiconductor chip to the substrate by inserting bumps formed on a rear surface of the semiconductor chip into the recess parts.

20. The method according to claim 11 , further comprising before the forming of the via-holes in the substrate, sequentially forming an insulating layer and a diffusion barrier film on the inside surfaces of the via-holes.