Automated management of verification waivers

1. A method comprising:

issuing, via a design verification tool, a request to perform a verification run on a component of an electric circuit design;

receiving, at said design verification tool and in response to an issuance of said request, configuration data specifying a list of waivers extracted from a plurality of waivers applicable to said electric circuit design as a whole, wherein

said list of waivers is extracted based upon waiver validity period data specifying at least one of a waiver expiration date and a waiver grant date, and

said list of waivers is applicable to said component of said electric circuit design rather than said electric circuit design as a whole;

identifying, utilizing said design verification tool, a potential design defect of said component of said electric circuit design; and

generating a verification run result including a set of design defects of said component of said electric circuit design, wherein

said set of design defects includes said potential design defect in response to a determination that no waiver of said list of waivers is applicable to said potential design defect, and

said set of design defects excludes said potential design defect in response to a determination that at least one waiver of said list of waivers is applicable to said potential design defect.

2. The method of claim 1 , further comprising

extracting said list of waivers utilizing a database of defined waivers comprising a plurality of entries, wherein each entry is associated with a hardware component identifier, an associated defect type, and metadata.

3. The method of claim 2 , wherein said metadata comprises at least one of responsibility data, association data, and expiration data.

4. The method of claim 2 , wherein

said database comprises at least one component of said electric circuit design grouped in a tree representing a corresponding electronic circuit hierarchy, wherein at least one waiver is associated with at least one of said at least one component; and

said extracting comprises traversing said plurality of entries of said database to generate said list of waivers.

5. The method of claim 2 , wherein

said method further comprises visualizing waiver data over time; and

said visualizing comprises,

creating an array of counters, each of said array of counters corresponding to each day between an earliest grant date and a latest expiration date of each waiver in said database, and

incrementing a corresponding counter of said array of counters for each waiver in said database for each day between a grant date and an expiration date of said each waiver.

6. The method of claim 2 , further comprising:

modifying, utilizing an entry tool, content of said database wherein said modifying comprises at least one of

modifying existing content of said database, and

adding content to said database associated with a new waiver.

7. A circuit arrangement to verify an electronic circuit design utilizing a design verification tool, said circuit arrangement comprising:

an entry tool;

a control unit;

a visualizing tool;

a database of defined waivers comprising a plurality of entries, each entry of said plurality of entries corresponding to a waiver and comprising a hardware component identifier and an associated defect type, wherein

said design verification tool, during a verification run, ignores a found design defect in response to a determination that a corresponding waiver, defined to waive said found design defect, is present in said database of defined waivers, and

each entry of said plurality of entries is further defined by metadata; and

a waiver extractor to generate a list of waivers, wherein each waiver in said list of waivers is added in response to a determination that at least one given criterion is fulfilled by metadata associated with said waiver during a traversal, by said waiver extractor, of said database, wherein the at least one given criterion indicates a waiver validity period specified by at least one of a waiver expiration date and a waiver grant date.

8. The circuit arrangement according to claim 7 , wherein said metadata comprise at least one of responsibility data, association data, and expiration data.

9. The circuit arrangement according to claim 7 , wherein said database comprises at least one component of said electric circuit design grouped in a tree representing a chip hierarchy, wherein at least one waiver is associated with said at least one component.

10. A computer program product for verifying an electronic circuit, the computer program product comprising:

a non-transitory computer readable storage medium having computer readable program code embodied therewith, the computer readable program code, when executed by a computer, causes said computer to perform a method comprising,

issuing a request to perform a verification run on a component of an electric circuit design;

receiving, in response to an issuance of said request, configuration data specifying a list of waivers extracted from a plurality of waivers applicable to said electric circuit design as a whole, wherein

said list of waivers is extracted based upon waiver validity period data specifying at least one of a waiver expiration date and a waiver grant date, and

said list of waivers is applicable to said component of said electric circuit design rather than said electric circuit design as a whole;

identifying a potential design defect of said component of said electric circuit design; and

generating a verification run result including a set of design defects of said component of said electric circuit design, wherein

said set of design defects includes said potential design defect in response to a determination that no waiver of said list of waivers is applicable to said potential design defect, and

said set of design defects excludes said potential design defect in response to a determination that at least one waiver of said list of waivers is applicable to said potential design defect.

11. The computer program product of claim 10 , said method further comprising

extracting said list of waivers utilizing a database of defined waivers comprising a plurality of entries, wherein each entry is associated with a hardware component identifier, an associated defect type, and metadata.

12. The computer program product of claim 11 , wherein said metadata comprises at least one of responsibility data, association data, and expiration data.

13. The computer program product of claim 11 , wherein

said database comprises at least one component of said electric circuit design grouped in a tree representing a corresponding electronic circuit hierarchy, wherein at least one waiver is associated with each said at least one component; and

said extracting comprises traversing said plurality of entries of said database to generate said list of waivers.

14. The computer program product of claim 11 , wherein

said method further comprises visualizing waiver data over time; and

said visualizing comprises,

creating an array of counters, each of said array of counters corresponding to each day between an earliest grant date and a latest expiration date of each waiver in said database, and

incrementing a corresponding counter of said array of counters for each waiver in said database for each day between a grant date and an expiration date of said each waiver.

15. The computer program product of claim 11 , said method further comprising:

modifying, utilizing an entry tool, content of said database wherein said modifying comprises at least one of

modifying existing content of said database, and

adding content to said database associated with a new waiver.