IP Library › Granted Patent US 8,507,927
Granted Patent B2
US 8,507,927 · App. 12/722,847 · Granted Aug 13, 2013

Semiconductor device with high density optical chips and manufacturing method thereof

Inventors: Atsuko Iida (Kanagawa, JP); Iwao Mitsuishi (Tokyo, JP)
Assignee: Kabushiki Kaisha Toshiba
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Quick Facts
Patent No.
US 8,507,927
App. No.
12/722,847
Granted
Aug 13, 2013
Kind
B2
Abstract

An aspect of the present invention provides a semiconductor device, in which densely packaging and high performance of optical elements are realized by a simple manufacturing process. The semiconductor device includes: a first chip module, a second chip module and a bonding layer. The first chip module includes a plurality of optical chips that are bonded within a substantially same plane with a first resin layer. The second chip module includes a plurality of control semiconductor chips and a plurality of connecting chips. The connecting chips include conductive materials piercing through the connecting chips. The control semiconductor chips and the connecting chips are bonded within a substantially same plane with a second resin layer. And the optical chips and the control semiconductor chips are electrically connected through the connecting chips.

Claims (11)

1. A semiconductor device comprising:

a first chip module;

a second chip module; and

a bonding layer configured to bond vertically the first chip module and the second chip module,

wherein the first chip module includes a plurality of optical chips, the optical chips are bonded within a substantially same plane, the optical chips are bonded by a first resin layer interposed therebetween, each of the optical chips including an optical element,

the second chip module includes a plurality of control semiconductor chips and a plurality of connecting chips, the control semiconductor chips control the optical chips, the connecting chips include conductive materials piercing through the connecting chips, the control semiconductor chips and the connecting chips being bonded within a substantially same plane, the control semiconductor chips and the connecting chips are bonded by a second resin layer interposed therebetween, the second resin layer is different from the first resin,

the optical chips and the control semiconductor chips are electrically connected through the connecting chips, and no chips or no conductive elements other than the optical chips are located in the first resin between the optical chips.

2. The device according to claim 1 , wherein the second chip module includes a heat radiation metal chip, the heat radiation metal chip is bonded within a substantially same plane along with the control semiconductor chips and the connecting chips, the second resin layer is interposed between the heat radiation metal chip and the control semiconductor chips and/or the connecting chips.

3. The device according to claim 1 , wherein the optical element is a light emitting element.

4. The device according to claim 1 , wherein fillers of the second resin layer and the bonding layer mainly contain AlN.

5. The device according to claim 1 , wherein the bonding layer includes connection bumps, the connection bumps connect lead electrodes of the optical chips and the conductive materials piercing through the connecting chips.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 12, 2010
From: IIDA, ATSUKO; MITSUISHI, IWAO
To: KABUSHIKI KAISHA TOSHIBA
Reel/Frame 024072/0950 →
Priority Claims (1)
JP 2009-080880 · Mar 30, 2009 · national
Continuity (1)
Related Publication 20100244059A1 · Sep 30, 2010