IP Library Granted Patent US 8,520,441
Granted Patent B2
US 8,520,441 · App. 12/947,693 · Granted Aug 27, 2013

Word line kicking when sensing non-volatile storage

Inventor: Jong Hak Yuh (Pleasanton, CA)
Assignee: SanDisk Technologies Inc.
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 8,520,441
App. No.
12/947,693
Granted
Aug 27, 2013
Kind
B2
Abstract

Methods and devices for sensing non-volatile storage are disclosed. Technology disclosed herein reduces the time for sensing operations of non-volatile storage such as read and program verify. In one embodiment, a kicking voltage is applied to a selected word line during a sensing operation. The kicking voltage may be applied to one end of a selected word line during a transition from a first reference voltage to a second reference voltage. The kicking voltage may help the other end of the word line reach the second reference voltage quickly. Since the bit lines can be sensed after the selected word line has reached the target reference voltage, the time delay prior to sensing of the bit lines may be reduced.

Claims (46)

1. A method for operating non-volatile storage, the method comprising:

applying a first read or verify reference voltage to a selected word line;

transitioning from the first read or verify reference voltage to a second read or verify reference voltage, the transitioning including:

changing the first read or verify reference voltage applied to the selected word line to a kicking voltage, the kicking voltage is greater than the second read or verify reference voltage if the second read or verify reference voltage is greater than the first read or verify reference voltage, the kicking voltage is less than the second read or verify reference voltage if the second read or verify reference voltage is less than the first read or verify reference voltage; and

changing the kicking voltage applied to the selected word line to the second read or verify reference voltage.

2. The method of claim 1 , wherein the changing the first read or verify reference voltage applied to the selected word line to the kicking voltage includes increasing the voltage applied to the selected word line from the first read or verify reference voltage to the kicking voltage, the changing the kicking voltage applied to the selected word line to the second read or verify reference voltage includes decreasing the kicking voltage to the second read or verify reference voltage.

3. The method of claim 1 , wherein the changing the first read or verify reference voltage applied to the selected word line to the kicking voltage includes decreasing the voltage applied to the selected word line from the first read or verify reference voltage to the kicking voltage, the changing the kicking voltage applied to the selected word line to the second read or verify reference voltage includes increasing the kicking voltage to the second read or verify reference voltage.

4. The method of claim 1 , further comprising:

transitioning from the second read or verify reference voltage to a third read or verify reference voltage that is greater than the second read or verify reference voltage, the kicking voltage is a first kicking voltage, the transitioning including:

increasing the second read or verify reference voltage to a second kicking voltage that is greater than the third read or verify reference voltage; and

reducing the second kicking voltage to the third read or verify reference voltage.

5. The method of claim 1 , further comprising:

sensing conditions of non-volatile storage elements associated with the selected word line in response to the first read or verify reference voltage; and

sensing conditions of non-volatile storage elements associated with the selected word line in response to the second read or verify reference voltage.

6. The method of claim 1 , further comprising:

maintaining a read pass voltage on unselected word lines while transitioning from the first read or verify reference voltage to the second read or verify reference voltage.

7. A method for operating non-volatile storage, the method comprising:

applying a read pass voltage to one or more unselected word lines;

applying a first reference voltage to a selected word line while applying the read pass voltage to the one or more unselected word lines;

sensing a condition of at least one non-volatile storage element associated with the selected word line in response to the first reference voltage;

ramping up the voltage applied to the selected word line from the first reference voltage to a level that is greater than a second reference voltage while maintaining the read pass voltage to the one or more unselected word lines, the second reference voltage is greater than the first reference voltage;

ramping down the voltage applied to the selected word line to the second reference voltage while maintaining the read pass voltage to the one or more unselected word lines; and

sensing a condition of at least one non-volatile storage element associated with the selected word line in response to the second reference voltage.

8. The method of claim 7 , further comprising:

ramping up the voltage applied to the selected word line from the second reference voltage to a level that is greater than a third reference voltage while maintaining the read pass voltage to the one or more unselected word lines, the third reference voltage is greater than the second reference voltage;

ramping down the voltage applied to the selected word line to the third reference voltage while maintaining the read pass voltage to the one or more unselected word lines; and

sensing a condition of at least one non-volatile storage element associated with the selected word line in response to the third reference voltage.

9. The method of claim 7 , further comprising:

ramping down the voltage applied to the selected word line from the second reference voltage to a level that is less than a third reference voltage while maintaining the read pass voltage to the one or more unselected word lines, the third reference voltage is less than the second reference voltage;

ramping up the voltage applied to the selected word line to the third reference voltage while maintaining the read pass voltage to the one or more unselected word lines; and

sensing a condition of at least one non-volatile storage element associated with the selected word line in response to the third reference voltage.

10. A non-volatile storage device comprising:

a plurality of non-volatile storage elements;

a plurality of word lines associated with the plurality of non-volatile storage elements; and

one or more managing circuits in communication with the one or more word lines, the one or more managing circuits apply a first read or verify reference voltage to a selected word line; the one or more managing circuits transition from applying the first read or verify reference voltage to applying a second read or verify reference voltage to the selected word line, as part of the transition from the first read or verify reference voltage to the second read or verify reference voltage the one or more managing circuits change the first read or verify reference voltage applied to the selected word line to a kicking voltage, the kicking voltage is greater than the second read or verify reference voltage if the second read or verify reference voltage is greater than the first read or verify reference voltage, the kicking voltage is less than the second read or verify reference voltage if the second read or verify reference voltage is less than the first read or verify reference voltage, the one or more managing circuits change the kicking voltage applied to the selected word line to the second read or verify reference voltage.

11. The non-volatile storage device of claim 10 , further comprising:

a voltage circuit having an input that inputs a read signal, the read signal includes the first read or verify reference voltage and the second read or verify reference voltage, the voltage circuit having a circuit output that outputs the first read or verify reference voltage for a first period, transitions from the first read or verify reference voltage to the second read or verify reference voltage during a second period, and is the second read or verify reference voltage during a third period, the circuit output transition includes ramping to a kicking voltage that is greater than the second read or verify reference voltage for a first portion of the second period and decreasing to the second read or verify reference voltage during a second portion of the second period, the one or more managing circuits apply the output of the circuit to a selected word line of the plurality of word lines when reading or verifying non-volatile storage elements associated with the selected word line.

12. The non-volatile storage device of claim 11 , wherein the circuit includes an amplifier that inputs the read signal, the amplifier has an output that ramps from the read signal to a voltage that is an offset higher than the read signal during the first portion of the second period, the read signal transitions from the first read or verify reference voltage to the second read or verify reference voltage prior to the end of the first portion of the second period.

13. The non-volatile storage device of claim 12 , wherein the amplifier output ramps down from the offset higher than the read signal to approximately the read signal during the second portion of the second period.

14. The non-volatile storage device of claim 13 , wherein the circuit inputs a kick signal that controls the ramping of the amplifier output during the first portion of the second period.

15. The non-volatile storage device of claim 13 , wherein the circuit includes at least one switch that couples the read signal to the circuit output during the first period and the third period.

16. The non-volatile storage device of claim 15 , wherein the at least one switch couples the amplifier output to the circuit output during the second period.

17. The non-volatile storage device of claim 10 , wherein as a part of changing the first read or verify reference voltage applied to the selected word line to the kicking voltage the one or more managing circuits increase the voltage applied to the selected word line from the first read or verify reference voltage to the kicking voltage, as a part of the changing the kicking voltage applied to the selected word line to the second read or verify reference voltage the one or more managing circuits decrease the kicking voltage to the second read or verify reference voltage.

18. The non-volatile storage device of claim 10 , wherein as a part of changing the first read or verify reference voltage applied to the selected word line to the kicking voltage the one or more managing circuits decrease the voltage applied to the selected word line from the first read or verify reference voltage to the kicking voltage, as a part of the changing the kicking voltage applied to the selected word line to the second read or verify reference voltage the one or more managing circuits increase the kicking voltage to the second read or verify reference voltage.

19. The non-volatile storage device of claim 10 , wherein the one or more managing circuits sense conditions of non-volatile storage elements associated with the selected word line in response to the first read or verify reference voltage, the one or more managing circuits sense conditions of non-volatile storage elements associated with the selected word line in response to the second read or verify reference voltage.

20. The non-volatile storage device of claim 10 , wherein the one or more managing circuits maintain a read pass voltage on unselected word lines while the one or more managing circuits transition the voltage applied to the selected word line from the first read or verify reference voltage to the second read or verify reference voltage.

Assignments (7)
SECURITY AGREEMENT Recorded Apr 25, 2025
From: SANDISK TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 071050/0001 →
PARTIAL RELEASE OF SECURITY INTERESTS Recorded Apr 25, 2025
From: JPMORGAN CHASE BANK, N.A., AS AGENT
To: SANDISK TECHNOLOGIES, INC.
Reel/Frame 071382/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 31, 2024
From: SANDISK TECHNOLOGIES LLC
To: SANDISK TECHNOLOGIES, INC.
Reel/Frame 069796/0423 →
CHANGE OF NAME Recorded May 25, 2016
From: SANDISK TECHNOLOGIES INC
To: SANDISK TECHNOLOGIES LLC
Reel/Frame 038807/0850 →
CORRECTIVE ASSIGNMENT TO CORRECT THE COVER SHEET PREVIOUSLY RECORDED ON REEL 025398 FRAME 0657. ASSIGNOR(S) HEREBY CONFIRMS THE INVENTOR'S NAME IS JONG HAK YUH. Recorded Nov 4, 2011
From: YUH, JONG HAK
To: SANDISK CORPORATION
Reel/Frame 027181/0528 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 17, 2011
From: SANDISK CORPORATION
To: SANDISK TECHNOLOGIES INC.
Reel/Frame 026294/0801 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 23, 2010
From: YU, JONG HAK
To: SANDISK CORPORATION
Reel/Frame 025398/0657 →
Continuity (1)
Related Publication 20120120729A1 · May 17, 2012