IP Library Granted Patent US 8,536,708
Granted Patent B2
US 8,536,708 · App. 13/605,020 · Granted Sep 17, 2013

Method of manufacturing a semiconductor device and semiconductor device

Inventors: Shinichi Akiyama (Kawasaki, JP); Kazuo Kawamura (Musashino, JP); Hisaya Sakai (Kawasaki, JP); Hirofumi Watatani (Kawasaki, JP); Kazuya Okubo (Kawasaki, JP)
Assignee: Fujitsu Semiconductor Limited
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Quick Facts
Patent No.
US 8,536,708
App. No.
13/605,020
Granted
Sep 17, 2013
Kind
B2
Abstract

A method of manufacturing a semiconductor device has forming, in a dielectric film, a first opening and a second opening located in the first opening, forming a first metal film containing a first metal over a whole surface, etching the first metal film at a bottom of the second opening using a sputtering process and forming a second metal film containing a second metal over the whole surface, and burying a conductive material in the second opening and the first opening.

Claims (14)

1. A semiconductor device, comprising: a first wiring layer formed over a semiconductor substrate;

a dielectric film formed over the first wiring layer;

a first opening formed in the dielectric film;

a second opening formed in the first opening and reaching the first wiring layer;

a first metal film containing a first metal and formed continuously from a sidewall of the first opening to a sidewall of the second opening;

a second metal film containing a second metal and formed continuously from the sidewall of the first opening to the sidewall of the second opening; and

a conductive material buried in the second opening and the first opening.

2. The semiconductor device according to claim 1 , wherein the first metal includes any one of titanium, zirconium, and manganese, or alloys thereof.

3. The semiconductor device according to claim 1 , wherein the second metal includes any one of tantalum and tungsten, or alloys thereof.

4. The semiconductor device according to claim 1 , wherein the conductive material includes copper.

5. The semiconductor device according to claim 1 further comprising, a third metal film formed at the sidewall of the second opening.

6. The semiconductor device according to claim 5 , wherein the third metal film contains the first metal and the second metal.

7. The semiconductor device according to claim 1 , wherein a bottom of the second opening being located below a upper surface of the first wiring.

8. The semiconductor device according to claim 1 , wherein the first metal film is formed at a bottom of the first opening and the second metal film is formed at the bottom of the first opening.

Assignments (4)
CHANGE OF ADDRESS Recorded Dec 23, 2016
From: FUJITSU SEMICONDUCTOR LIMITED
To: FUJITSU SEMICONDUCTOR LIMITED
Reel/Frame 041188/0401 →
CHANGE OF NAME Recorded Sep 17, 2012
From: FUJITSU MICROELECTRONICS LIMITED
To: FUJITSU SEMICONDUCTOR LIMITED
Reel/Frame 028994/0752 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 12, 2012
From: FUJITSU LIMITED
To: FUJITSU MICROELECTRONICS LIMITED
Reel/Frame 028943/0176 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 7, 2012
From: AKIYAMA, SHINICHI; KAWAMURA, KAZUO; SAKAI, HISAYA; WATATANI, HIROFUMI; OKUBO, KAZUYA
To: FUJITSU LIMITED
Reel/Frame 028918/0006 →
Priority Claims (1)
JP 2007-119144 · Apr 27, 2007 · national
Continuity (3)
Division 13164180 · Jun 20, 2011
Division 12110662 · Apr 28, 2008
Related Publication 20120326315A1 · Dec 27, 2012