Methods of manufacturing semiconductor structures and devices including nanotubes, and semiconductor structures, devices, and systems fabricated using such methods
A method of forming a plurality of nanotubes is disclosed. Particularly, a substrate may be provided and a plurality of recesses may be formed therein. Further, a plurality of nanotubes may be formed generally within each of the plurality of recesses and the plurality of nanotubes may be substantially surrounded with a supporting material. Additionally, at least some of the plurality of nanotubes may be selectively shortened and at least a portion of the at least some of the plurality of nanotubes may be functionalized. Methods for forming semiconductor structures intermediate structures, and semiconductor devices are disclosed. An intermediate structure, intermediate semiconductor structure, and a system including nanotube structures are also disclosed.
1. A semiconductor structure, comprising:
a semiconductor substrate having a first surface and a second, opposing surface;
a dielectric layer formed over at least a portion of the first surface of the semiconductor substrate;
at least one recess extending through the dielectric layer and into the first surface of the semiconductor substrate;
a plurality of conductive nanotubes disposed within the at least one recess;
a volume of supporting material surrounding the plurality of conductive nanotubes and filling spaces between conductive nanotubes of the plurality of conductive nanotubes within the at least one recess;
a portion of a nanotube formation substrate material disposed about a periphery of the supporting material within the at least one recess; and
a conductive layer formed over the plurality of conductive nanotubes.
2. The semiconductor structure of claim 1 , wherein the plurality of conductive nanotubes extends to a planar surface of the dielectric layer.
3. The semiconductor structure of claim 1 , further comprising a conductive via extending from the second, opposing surface of the semiconductor substrate to the first surface of the semiconductor substrate, the conductive via being in electrical communication with at least some of the plurality of conductive nanotubes.
4. The semiconductor structure of claim 1 , wherein at least some of the plurality of conductive nanotubes are configured for conducting fluid therethrough.
5. The semiconductor structure of claim 1 , wherein the plurality of conductive nanotubes, the volume of supporting material, and the portion of the nanotube formation substrate material within the at least one recess comprise a singulated nanotube bundle comprising at least two nanotubes formed with and removed from a larger plurality of nanotubes.
6. The semiconductor structure of claim 5 , further comprising a reinforcement material deposited between a periphery of the singulated nanotube bundle and a side wall of the at least one recess, wherein the reinforcement material affixes the singulated nanotube bundle within the at least one recess.
7. A system, comprising:
at least one input device;
at least one output device; and
a computing device including at least one semiconductor device, comprising:
a semiconductor substrate having a first surface and a second, opposing surface;
an insulative layer formed over at least a portion of the semiconductor substrate;
at least one recess extending at least partially through the insulative layer;
a plurality of nanotubes within the at least one recess, wherein the plurality of nanotubes comprises a singulated nanotube bundle comprising at least two nanotubes formed with and removed from a larger plurality of nanotubes, wherein the singulated nanotube bundle further comprises:
a volume of supporting material surrounding the at least two nanotubes and filling spaces between the at least two nanotubes; and
a portion of a nanotube formation substrate material disposed about a periphery of the supporting material; and
a reinforcement material deposited between a periphery of the singulated nanotube bundle and a side wall of the at least one recess, wherein the reinforcement material affixes the singulated nanotube bundle within the at least one recess.
8. The system of claim 7 , wherein the plurality of nanotubes extends to a planar surface of the insulative layer.
9. The system of claim 7 , further comprising a conductive via extending from the second, opposing surface of the semiconductor substrate to at least some of the plurality of nanotubes in the at least one recess and in electrical communication therewith.
10. The system of claim 7 , wherein at least some of the plurality of nanotubes are configured for conducting fluid therethrough.