Semiconductor wafer and manufacturing method of semiconductor device
A method of manufacturing a semiconductor device includes preparing a semiconductor wafer including a silicon substrate and a laminate having a compound semiconductor layer; etching and removing a part of the laminate in a thickness direction to form trench regions in a grid, each trench region including a plurality of stripe grooves extending in parallel to each other; filling the groove with a material having a lower hardness than the compound semiconductor layer to form a buried region; and dividing the semiconductor wafer into a plurality of chips by dicing using a blade at a dicing line which is defined within the trench region and includes a plurality of the buried regions.
1. A method of manufacturing a semiconductor device comprising:
preparing a semiconductor wafer including a silicon substrate and a laminate having a compound semiconductor layer with a higher hardness than that of the silicon substrate;
etching and removing a part of the laminate in a thickness direction until the silicon substrate is exposed to form trench regions in a grid, each trench region including a plurality of stripe grooves extending in parallel to each other;
filling an inside of the grooves with a material having a lower hardness than the compound semiconductor layer to form a buried region, wherein the inside of each of the grooves is filled with the material having the lower hardness than that of the compound semiconductor layer to form a cavity, which is surrounded by the material having the lower hardness than that of the compound semiconductor layer, within each of the buried regions;
forming semiconductor devices in element arrangement regions of the laminate each surrounded by the trench regions; and
dividing the semiconductor wafer into a plurality of chips for each semiconductor device by dicing using a blade at a dicing line which is defined within the trench region and includes at least one of the buried regions.
2. The method of claim 1 , wherein the grooves are filled to allow upper surfaces of the buried regions to be located in a same plane level as an upper surface of the laminate.
3. The method of claim 1 , wherein the sectional shape of each of the grooves along a direction orthogonal to a direction that the groove extends is a tapered shape narrow at the bottom and wide at the top.
4. The method of claim 1 , further comprising:
forming a high resistance region on a side surface and a bottom surface of each of the buried region.
5. The method of claim 1 , wherein the material filling the inside of each of the grooves includes at least a high resistance material.
6. The method of claim 1 , wherein the dicing line is defined so that at least one of the buried regions exist in each side of the dicing line.
7. The method of claim 1 , wherein each of the grooves is filled with a polysilicon film after an insulating film is formed on a side surface and a bottom surface of each of the grooves.
8. The method of claim 1 , wherein each of the grooves is filled with any of a metal and a resin after an insulating film is formed on a side surface and a bottom surface of each of the grooves.
9. The method of claim 4 , wherein each of the grooves is filled with a polysilicon film.