Granted Patent B2

US 8,709,875 · App. 13/549,518 · Granted Apr 29, 2014

Inventors: Jinzhong Yao (Tianjin, CN); Zhigang Bai (Tianjin, CN); Xuesong Xu (Tianjin, CN)

Assignee: Freescale Semiconductor, Inc.

Abstract

Claims (29)

1. A method of packaging an integrated circuit, comprising the steps of:

providing a first lead frame of a dual gauge lead frame, the first lead frame comprising a thick die pad;

attaching a tape to a first side of the thick die pad;

attaching a power semiconductor die to a second side of the thick die pad;

providing a second lead frame of the dual gauge lead frame, the second lead frame comprising a plurality of thin lead fingers;

directly attaching first ends of the lead fingers to bonding pads on an active surface of the power semiconductor die such that the lead fingers are in contact with and electrically connected to the bonding pads; and

dispensing a molding compound onto a top surface of the dual gauge lead frame such that the molding compound covers the power semiconductor die and the lead fingers.

2. The method of packaging an integrated circuit of claim 1 , further comprising electrically connecting additional bonding pads of the power semiconductor die to bonding pads of a second die with bond wires.

3. The method of packaging an integrated circuit of claim 2 , further comprising electrically connecting additional bonding pads of the second die to additional lead fingers of the second lead frame.

4. The method of packaging an integrated circuit of claim 1 , further comprising removing the tape from the die pad, wherein second ends of the lead fingers are exposed after removing the tape.

5. The method of packaging an integrated circuit of claim 1 , wherein a thickness of the die pad is substantially greater than a thickness of the lead fingers.

6. The method of packaging an integrated circuit of claim 5 , wherein the thickness of the die pad is about 30 mils and the thickness of the lead fingers is about 10 mils.

7. The method of packaging an integrated circuit of claim 1 , wherein attaching the first ends of the lead fingers to the die comprises attaching the lead fingers to the die with a conductive adhesive.

8. The method of packaging an integrated circuit of claim 7 , wherein the conductive adhesive comprises one of a polymer and solder.

9. The method of packaging an integrated circuit of claim 1 , wherein the lead fingers are bent to form a Z-shape.

10. A method of packaging a power semiconductor device, comprising the steps of:

providing a power frame having a plurality of die pads;

attaching power semiconductor dies to respective die pads of the power frame;

singulating the power frame to form individual power frame assemblies, each power frame assembly having at least one die mounted on at least one die pad;

attaching a tape to a first side of the individual power frame assemblies;

attaching input-output lead frames having lead fingers to an active surface of each of the power semiconductor dies, wherein said attaching also electrically connects the input-output lead frames to respective power semiconductor dies, and wherein a thickness of the input-output lead frame is less than a thickness of the power frame;

dispensing a molding compound onto a top surface of the power frame assemblies such that the molding compound covers the power semiconductor dies, the power frames and the lead fingers; and

singulating the input-output lead frames to form individual power semiconductor device packages.

11. The method of packaging a power semiconductor device of claim 10 , wherein attaching the input-output lead frame comprises attaching one end of the leads of the input-output lead frame to respective die pads of the respective power semiconductor dies with a conductive adhesive and curing the adhesive.

12. The method of packaging a power semiconductor device of claim 11 , further comprising removing the tape after the molding compound dispensing step.

13. The method of packaging a power semiconductor device of claim 11 , further comprising the steps of:

attaching a control die to a die pad of the input-output lead frame;

electrically connecting some of the die bonding pads of the power semiconductors to die bonding pads of the control die with bond wires; and

connecting some of the die bonding pads of the control die to small leads of the input-output lead frame with wires.

Assignments (31)

Priority Claims (1)

Continuity (1)