Nanolithographic method of manufacturing an embedded passive device for a microelectronic application, and microelectronic device containing same
A method of manufacturing an embedded passive device for a microelectronic application comprises steps of providing a substrate ( 110, 210, 310 ), nanolithographically forming a first section ( 121, 221, 321 ) of the embedded passive device over the substrate, and nanolithographically forming subsequent sections ( 122, 222, 322 ) the embedded passive device adjacent to the first section. The resulting embedded passive device may contain features less than approximately 100 nm in size.
1. A microelectronic device comprising:
a substrate; and
an embedded passive device over the substrate, the embedded passive device comprising:
a first section over the substrate; and
subsequent sections adjacent to the first section,
wherein:
at least one of the first section and the subsequent sections have a thickness of no greater than 100 nanometers.
2. The microelectronic device of claim 1 wherein:
the embedded passive device has a vertical orientation in which a first one of the subsequent sections is located above the first section and a second one of the subsequent sections is located above the first one of the subsequent sections.
3. The microelectronic device of claim 1 wherein:
the embedded passive device has a horizontal orientation in which the first section and each of the subsequent sections are located in a plane that is parallel to a plane of the substrate.