TCE compensation for package substrates for reduced die warpage assembly
A method for assembling die packages includes attaching contacts on a first side of a plurality of first die to substrate pads on a top surface of a composite carrier. The composite carrier includes a package substrate including at least one embedded metal layer having its bottom surface secured to a semiconductor wafer. The composite carrier minimizes effects of the CTE mismatch between the die and the package substrate during assembly reduces warpage of the die. After the attaching, the semiconductor wafer is removed from the package substrate. Electrically conductive connectors are attached to the bottom surface of the package substrate, and the package substrate is sawed to form a plurality of singulated die packages.
1. A method for assembling stacked die packages, comprising:
attaching contacts on a first side of a plurality of first die to substrate pads on a top surface of a composite carrier, wherein said composite carrier comprises a package substrate including at least one embedded metal layer having its bottom surface secured to a semiconductor wafer;
attaching each of a plurality of singulated second die to respective one from said plurality of first die to form a plurality of die stacks on said package substrate;
removing said semiconductor wafer from said package substrate;
attaching a plurality of electrically conductive connectors to said bottom surface of said package substrate, and
sawing said package substrate to form a plurality of singulated stacked die packages.
2. The method of claim 1 , wherein said semiconductor wafer comprises a silicon wafer and said package substrate comprises an organic substrate.
3. The method of claim 1 , wherein said plurality of first die comprises through substrate via (TSV) die that include TSVs, wherein said contacts include contacts to said TSVs.
4. The method of claim 3 , further comprising:
thinning a second side of said plurality of TSV die to expose said TSVs to provide exposed TSV areas, and
attaching a plurality of singulated second die to respective said TSV contacts coupled to said exposed TSV areas to form a plurality of die stacks on said package substrate.
5. The method of claim 1 , wherein said plurality of first die are disposed on a wafer.
6. The method of claim 1 , wherein said plurality of first die comprise singulated die.
7. A method for assembling stacked die packages, comprising:
attaching a topside of a plurality of singulated through substrate via (TSV) die having embedded TSVs including topside pads coupled to respective said TSVs to substrate pads on a top surface of a composite carrier, said composite carrier comprising an organic substrate including at least one embedded metal layer having its bottom surface secured to a silicon wafer;
thinning a bottomside of said plurality of singulated TSV die to provide exposed TSV areas;
forming bottomside TSV contacts on said exposed TSV areas;
attaching a plurality of singulated second die to respective said bottomside TSV contacts to form a plurality of die stacks on said organic substrate;
removing said silicon wafer from said organic substrate;
attaching a plurality of electrically conductive connectors to said bottom surface of said organic substrate, and
sawing through said organic substrate to form a plurality of singulated stacked die packages.
8. The method of claim 7 , wherein said plurality of TSV die are disposed on a TSV wafer.
9. The method of claim 7 , wherein said plurality of TSV die comprise singulated TSV die.