IP Library Granted Patent US 8,816,498
Granted Patent B2
US 8,816,498 · App. 13/189,127 · Granted Aug 26, 2014

Pillar design for conductive bump

Inventors: Cheng-Chieh Hsieh (Yongkang, TW); Cheng-Lin Huang (Hsin-Chu, TW); Po-Hao Tsai (Zhongli, TW); Shang-Yun Hou (Hsin-Chu, TW); Jing-Cheng Lin (Hsin-Chu, TW); Shin-Puu Jeng (Hsin-Chu, TW)
Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
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Quick Facts
Patent No.
US 8,816,498
App. No.
13/189,127
Granted
Aug 26, 2014
Kind
B2
Abstract

A system and method for conductive pillars is provided. An embodiment comprises a conductive pillar having trenches located around its outer edge. The trenches are used to channel conductive material such as solder when a conductive bump is formed onto the conductive pillar. The conductive pillar may then be electrically connected to another contact through the conductive material.

Claims (32)

1. A semiconductor device comprising:

a first substrate; and

a conductive post extending away from the first substrate, the conductive post comprising one or more trenches located along a sidewall of the conductive post, the one or more trenches being perpendicular to the first substrate.

2. The semiconductor device of claim 1 , further comprising a conductive material located within the one or more trenches.

3. The semiconductor device of claim 2 , wherein the conductive material is solder.

4. The semiconductor device of claim 2 , further comprising:

a second substrate located over the first substrate; and

a conductive region located on the second substrate, wherein the conductive region is in contact with the conductive material.

5. The semiconductor device of claim 2 , wherein the conductive material extends beyond a diameter of the conductive post.

6. The semiconductor device of claim 2 , wherein the conductive material fills only part of the one or more trenches.

7. The semiconductor device of claim 1 , wherein the conductive post comprises copper.

8. The semiconductor device of claim 1 , wherein the one or more trenches comprise at least two or more trenches arranged symmetrically around the conductive post.

9. A semiconductor device comprising:

a first substrate;

a conductive post extending away from the substrate, the conductive post having a first longitudinal axis; and

at least one trench within the conductive post, the at least one trench having a second longitudinal axis parallel with the first longitudinal axis.

10. The semiconductor device of claim 9 , further comprising a conductive material located at least partially within the at least one trench.

11. The semiconductor device of claim 10 , wherein the conductive material comprises solder.

12. The semiconductor device of claim 10 , further comprising:

a second substrate facing the first substrate; and

a conductive region on the second substrate, the conductive region in physical and electrical contact with the conductive material.

13. The semiconductor device of claim 9 , wherein the at least one trench further comprises three trenches.

14. The semiconductor device of claim 9 , wherein the at least one trench further comprises four trenches.

15. A semiconductor device comprising:

a conductive post extending away from a substrate;

one or more trenches extending from a first end of the conductive post to a second end of the conductive post; and

a conductive material located at least partially within the one or more trenches.

16. The semiconductor device of claim 15 , wherein the conductive material comprises solder.

17. The semiconductor device of claim 15 , wherein the conductive material fills only part of the one or more trenches.

18. The semiconductor device of claim 15 , wherein the conductive material extends beyond an outer edge of the conductive post.

19. The semiconductor device of claim 15 , wherein the one or more trenches comprises a plurality of trenches arranged symmetrically around an outer edge of the conductive post.

20. The semiconductor device of claim 15 , wherein the conductive post comprises copper.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 16, 2014
From: HSIEH, CHENG-CHIEH; HUANG, CHENG-LIN; TSAI, PO-HAO; HOU, SHANG-YUN; LIN, JING-CHENG; JENG, SHIN-PUU
To: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY
Reel/Frame 033327/0636 →
Continuity (1)
Related Publication 20130020698A1 · Jan 24, 2013