IC device including package structure and method of forming the same
View Patent ↗Various embodiments provide semiconductor devices including a package structure and methods of forming the semiconductor devices. In one embodiment, the package structure can include a through-hole at least partially filled by one or more layers of material(s) to form a through-hole interconnect between semiconductor devices in the package structure. The through-hole can be filled by an insulating layer, a diffusion barrier layer, a metal interconnect layer, and/or a protective layer having a total thickness from the sidewall of the through-hole of less than or equal to the radius of the through-hole.
1. An integrated circuit (IC) device comprising:
a first substrate structure;
a first metal interconnect structure disposed on the first substrate structure;
a second substrate structure disposed over the first substrate structure, the second substrate structure including a through-hole disposed there-through and positioned over the first metal interconnect structure on the first substrate structure;
a second metal interconnect structure disposed on the second substrate structure;
an insulating layer disposed on sidewall of the through-hole in the second substrate structure;
a diffusion barrier layer disposed on the insulating layer, a portion of the first metal interconnect structure corresponding to the through-hole, a surface portion of the second substrate structure, and the second metal interconnect structure on the second substrate structure; and
a metal interconnect layer disposed on the diffusion barrier layer, wherein a total thickness of the insulating layer, the diffusion barrier layer, and the metal interconnect layer is less than a radius of the through-hole.
2. The device of claim 1 , further including a protective layer disposed on the metal interconnect layer, wherein the insulating layer, the diffusion barrier layer, the metal interconnect layer, and the protective layer have a total thickness of less than or equal to the radius of the through-hole.
3. The device of claim 2 , wherein the total thickness is less than about 1 μm.
4. The device of claim 1 , wherein the metal interconnect layer is made of a material including tungsten or aluminum.
5. The device of claim 1 , wherein the first substrate structure includes a first semiconductor device electrically connected to the first metal interconnect structure, and the second substrate structure includes a second semiconductor device electrically connected to the second metal interconnect structure.
6. The device of claim 5 , wherein one or both of the first semiconductor device and the second semiconductor device include a MOS transistor, a diode, a memory, a resistor, a capacitor, an inductor, or a combination thereof.
7. The device of claim 1 , wherein the through-hole has a diameter ranging from about 5 μm to about 15 μm.
8. The device of claim 1 , further including a bonding layer configured to bond the first substrate structure and the second substrate structure.
9. The device of claim 8 , wherein the bonding layer is made of a material including silicon oxide, polyimide, epoxy resin, benzocyclobutene, or a combination thereof.
10. The device of claim 1 , wherein a portion of the metal interconnect layer is exposed by the protective layer for an electrical connection.
11. A method of forming an integrated circuit (IC) device comprising:
providing a first substrate structure including a first metal interconnect structure disposed thereon;
forming a first protective layer over the first substrate structure to expose the first metal interconnect structure;
providing a second substrate structure over the first substrate structure to form a bonded structure, wherein the second substrate structure includes a first surface having a second metal interconnect structure disposed thereon;
forming a second protective layer over the second substrate structure to expose the second metal interconnect structure;
forming a through-hole through the second substrate structure and positioned on the first metal interconnect structure on the first substrate structure;
forming an insulating layer on sidewall of the through-hole in the second substrate structure;
forming a diffusion barrier layer on each of the insulating layer, the exposed portion of the first metal interconnect structure, the exposed portion of the second metal interconnect structure, and a surface portion of the second protective layer; and
forming a metal interconnect layer on the diffusion barrier layer, wherein a total thickness of the insulating layer, the diffusion barrier layer, and the metal interconnect layer is less than a radius of the through-hole.
12. The method of claim 11 , further including forming a third protective layer on the metal interconnect layer, wherein the insulating layer, the diffusion barrier layer, the metal interconnect layer, and the third protective layer have a total thickness of less than or equal to the radius of the through-hole.
13. The method of claim 11 , wherein the through-hole is formed prior to forming the bonded structure by binding a second surface of the second substrate structure to the first protective layer of the first substrate structure.
14. The method of claim 11 , wherein the through-hole is formed after forming the bonded structure by binding a second surface of the second substrate structure to the first protective layer of the first substrate structure, wherein the formation of the through-hole includes removing a portion of the first protective layer to expose the first metal interconnect structure.
15. The method of claim 11 , wherein a bonding layer is provided on a second surface of the second substrate structure to bind the second substrate structure to the first protective layer of the first substrate structure.
16. The method of claim 11 , wherein the through-hole is formed in a semiconductor die for forming the second substrate structure, or after forming the second protective layer on the first surface of the second substrate structure, or after forming a bonding layer on a second surface of the second substrate structure.
17. The method of claim 11 , wherein the bonded structure is formed by a process including a high temperature direct bonding process, a low temperature direct bonding process, an anodic bonding process, a glass solder bonding process, or a combination thereof.
18. The method of claim 11 , wherein the through-hole is formed by a deep reactive ion etching (DRIE) process or a Bosch process.
19. The method of claim 11 , wherein the metal interconnect layer is formed on the diffusion barrier layer by a process including a sputtering deposition, a plasma physical vapor deposition, a high density plasma chemical vapor deposition, a low pressure chemical vapor deposition, an atomic layer deposition, or a combination thereof.
20. The method of claim 11 , wherein the first substrate structure includes a first semiconductor device electrically connected to the first metal interconnect structure, and the second substrate structure includes a second semiconductor device electrically connected to the second metal interconnect structure.