Transistors and semiconductor constructions
Some embodiments include a transistor having a first electrically conductive gate portion along a first segment of a channel region and a second electrically conductive gate portion along a second segment of the channel region. The second electrically conductive gate portion is a different composition than the first electrically conductive gate portion. Some embodiments include a method of forming a semiconductor construction. First semiconductor material and metal-containing material are formed over a NAND string. An opening is formed through the metal-containing material and the first semiconductor material, and is lined with gate dielectric. Second semiconductor material is provided within the opening to form a channel region of a transistor. The transistor is a select device electrically coupled to the NAND string.
1. A transistor, comprising:
gate dielectric directly against a channel region;
a first conductive gate portion along a first segment of the channel region, and spaced from said first segment by at least the gate dielectric; and
a second conductive gate portion along a second segment of the channel region, and spaced from said second segment by at least the gate dielectric; the second segment being adjacent the first segment; the second conductive gate portion comprising a different composition from the first conductive gate portion and being directly against the first conductive gate portion.
2. The transistor of claim 1 wherein the first and second conductive gate portions are directly against the gate dielectric.
3. The transistor of claim 1 wherein the first and second conductive gate portions are directly against an electrically conductive material, which in turn is directly against the gate dielectric.
4. The transistor of claim 1 wherein one of the first and second gate portions consists of conductively-doped semiconductor material and the other of the first and second gate portions comprises metal.
5. The transistor of claim 4 wherein said one of the first and second gate portions consists of conductively-doped polysilicon.
6. The transistor of claim 4 wherein said other of the first and second gate portions comprises metal nitride or metal silicide.
7. A semiconductor construction, comprising:
a channel region;
gate dielectric directly against the channel region;
a semiconductor-containing gate portion along a first segment of the channel region and spaced from said first segment by at least the gate dielectric; the semiconductor-containing gate portion consisting of conductively-doped semiconductor material;
a metal-containing gate portion along a second segment of the channel region and spaced from said second segment by at least the gate dielectric; the second segment being adjacent the first segment; the metal-containing gate portion being directly against the semiconductor-containing gate portion; and
the semiconductor-containing gate portion, metal-containing gate portion, dielectric material and channel region comprising a transistor.
8. The semiconductor construction of claim 7 wherein the metal-containing gate portion and the semiconductor-containing gate portion are both directly against the gate dielectric.
9. The semiconductor construction of claim 8 wherein the metal-containing gate portion is a first metal-containing gate portion, and further comprising a second metal-containing gate portion directly against the gate dielectric and spaced from the first metal-containing gate portion by the semiconductor-containing gate portion.
10. The semiconductor construction of claim 8 wherein the semiconductor-containing gate portion is a first semiconductor-containing gate portion, and further comprising a second semiconductor-containing gate portion directly against the gate dielectric and spaced from the first semiconductor-containing gate portion by the metal-containing gate portion.
11. The semiconductor construction of claim 7 wherein the metal-containing gate portion and the semiconductor-containing gate portion are both directly against an electrically conductive material, which in turn is directly against the gate dielectric.
12. The semiconductor construction of claim 11 wherein the metal-containing gate portion is a first metal-containing gate portion, and further comprising a second metal-containing gate portion directly against the electrically conductive material and spaced from the first metal-containing gate portion by the semiconductor-containing gate portion.
13. The semiconductor construction of claim 11 wherein the semiconductor-containing gate portion is a first semiconductor-containing gate portion, and further comprising a second semiconductor-containing gate portion directly against the electrically conductive material and spaced from the first semiconductor-containing gate portion by the metal-containing gate portion.
14. The semiconductor construction of claim 7 wherein the metal-containing gate portion comprises metal silicide or metal nitride.
15. The semiconductor construction of claim 7 wherein the semiconductor-containing gate portion consists of conductively-doped polysilicon.
16. The semiconductor construction of claim 7 wherein the channel region is over such an upper surface of a base and extends substantially vertically relative to such upper surface.
17. The semiconductor construction of claim 16 further comprising a NAND string, and wherein the transistor is electrically coupled with the NAND string.
18. The semiconductor construction of claim 17 wherein:
the channel region is configured as a pillar laterally surrounded by the gate dielectric; and
the metal-containing gate portion and the semiconductor-containing gate portion entirely laterally surround said pillar; with the metal-containing gate portion being over the semiconductor-containing gate portion.
19. The semiconductor construction of claim 18 wherein:
the semiconductor-containing gate portion consists of conductively-doped polysilicon; and
the metal-containing gate portion consists of titanium nitride or tungsten silicide.