IP Library Granted Patent US 8,855,589
Granted Patent B2
US 8,855,589 · App. 13/868,640 · Granted Oct 7, 2014

Tuner

Inventors: Tomoya Kanzawa (Gunma-ken, JP); Shinji Kurihara (Gunma-ken, JP); Katu Horikoshi (Gunma-ken, JP)
Assignee: Semiconductor Components Industries, LLC
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Quick Facts
Patent No.
US 8,855,589
App. No.
13/868,640
Granted
Oct 7, 2014
Kind
B2
Abstract

A center frequency F 0 of an IF filter is effectively adjusted. The IF filter filters a down-converted signal centering around the center frequency F 0 . A pseudo sine wave generation circuit generates a pseudo sine wave having a level change of at least two steps respectively on both positive and negative sides. The pseudo sine wave is made to pass through the IF filter by a switch circuit, and in the state, an F 0 adjustment circuit adjusts the center frequency F 0 in the IF filter 14 by comparing a phase of the pseudo sine wave with a phase of a signal after passing through the IF filter.

Claims (75)

1. A tuner which down-converts an RF signal to an IF signal and performs signal processing, comprising:

an IF filter which filters a down-converted signal centering around a center frequency F 0 to take out the IF signal;

a pseudo sine wave generation circuit which generates a pseudo sine wave having a level change of at least two steps respectively on both positive and negative sides;

a switch circuit which supplies the pseudo sine wave to the IF filter instead of the RF signal; and

an F 0 adjustment circuit which adjusts the center frequency F 0 of the IF filter,

wherein

the pseudo sine wave is made to pass through the IF filter by the switch circuit, and

in this state, the F 0 adjustment circuit compares a phase of the pseudo sine wave with a phase of the signal after passing through the IF filter and adjusts the center frequency F 0 in the IF filter according to an obtained comparison result.

2. The tuner according to claim 1 , wherein

the pseudo sine wave generated in the pseudo sine wave generation circuit has a level change of two steps respectively on both positive and negative sides.

3. The tuner according to claim 2 , wherein

the pseudo sine wave generation circuit generates two rectangular waves that have a one-step level change on both positive and negative sides, and adds the two rectangular waves to generate the pseudo sine wave having a level change of two steps respectively on both positive and negative sides.

4. The tuner according to claim 3 , wherein

the F 0 adjustment circuit includes a phase comparator, and

the phase comparator compares the phase of the pseudo sine wave with the phase of the signal after passing through the IF filter.

5. The tuner according to claim 4 , wherein

the F 0 adjustment circuit includes a logic circuit and a DAC (digital/analog converter) for F 0 adjustment,

the logic circuit receives a signal of a comparison result from the phase comparator and rewrites data inside the DAC for F 0 adjustment on the basis of the comparison result, and

the DAC for F 0 adjustment supplies the signal based on the rewritten data to the IF filter to change the center frequency of the IF filter.

6. The tuner according to claim 2 , wherein

the F 0 adjustment circuit includes a phase comparator, and

the phase comparator compares the phase of the pseudo sine wave with the phase of the signal after passing through the IF filter.

7. The tuner according to claim 6 , wherein

the F 0 adjustment circuit includes a logic circuit and a DAC (digital/analog converter) for F 0 adjustment,

the logic circuit receives a signal of a comparison result from the phase comparator and rewrites data inside the DAC for F 0 adjustment on the basis of the comparison result, and

the DAC for F 0 adjustment supplies the signal based on the rewritten data to the IF filter to change the center frequency of the IF filter.

8. The tuner according to claim 1 , wherein

the F 0 adjustment circuit includes a phase comparator, and

the phase comparator compares the phase of the pseudo sine wave with the phase of the signal after passing through the IF filter.

9. The tuner according to claim 8 , wherein

the F 0 adjustment circuit includes a logic circuit and a DAC (digital/analog converter) for F 0 adjustment,

the logic circuit receives a signal of a comparison result from the phase comparator and rewrites data inside the DAC for F 0 adjustment on the basis of the comparison result, and

the DAC for F 0 adjustment supplies the signal based on the rewritten data to the IF filter to change the center frequency of the IF filter.

10. The tuner according to claim 1 , further comprising:

an S meter which detects a signal level of an IF signal that is output of the IF filter; and

an S meter adjustment circuit which adjusts output of the S meter,

wherein

the pseudo sine wave is made to pass through the IF filter by the switch circuit, and

in this state, a detection level of the S meter is adjusted depending on a level of an output signal of the S meter circuit.

11. An adjustment method of an IF filter, comprising:

generating a pseudo sine wave having a level change of at least two steps respectively on both positive and negative sides;

operating a switch which selects either one of an RF signal and the pseudo sine wave to select the pseudo sine wave;

down-converting the pseudo sine wave;

filtering the down-converted signal centering around a center frequency F 0 by the IF filter to take out an IF signal; and

comparing a phase of the taken-out IF signal and a phase of the pseudo sine wave and adjusting the center frequency F 0 in the IF filter according to an obtained comparison result.

12. The method according to claim 11 , wherein

the pseudo sine wave has a level change of two steps respectively on both positive and negative sides.

13. The method according to claim 12 , wherein

the pseudo sine wave is generated by adding two rectangular waves that have a one-step level change on both positive and negative sides.

14. The method according to claim 13 , further comprising:

rewriting data inside a DAC for F 0 adjustment on the basis of the comparison result; and

the DAC for F 0 adjustment supplying a signal based on the rewritten data to the IF filter to change the center frequency of the IF filter.

15. The method according to claim 12 , further comprising:

rewriting data inside a DAC for F 0 adjustment on the basis of the comparison result; and

the DAC for F 0 adjustment supplying a signal based on the rewritten data to the IF filter to change the center frequency of the IF filter.

16. The method according to claim 11 , further comprising:

rewriting data inside a DAC for F 0 adjustment on the basis of the comparison result; and

the DAC for F 0 adjustment supplying a signal based on the rewritten data to the IF filter to change the center frequency of the IF filter.

17. The method according to claim 11 , further comprising:

in the state of making the pseudo sine wave pass through the IF filter by the switch circuit, detecting a signal level of the IF signal that is output of the IF filter by an S meter circuit; and

adjusting a detection level of the S meter depending on a level of an output signal of the S meter circuit.

18. The tuner according to claim 17 , wherein

the S meter adjustment circuit adjusts the detection level of the S meter to a prescribed value.

19. A tuner which down-converts an RF signal to an IF signal and performs signal processing, comprising:

an IF filter which filters a down-converted signal centering around a center frequency F 0 to take out the IF signal;

an S meter which detects a signal level of the IF signal that is output of the IF filter;

an S meter adjustment circuit which adjusts output of the S meter;

a pseudo sine wave generation circuit which generates a pseudo sine wave having a level change of at least two steps respectively on both positive and negative sides; and

a switch circuit which supplies the pseudo sine wave to the IF filter instead of the RF signal,

wherein

the pseudo sine wave is made to pass through the IF filter by the switch circuit, and

in this state, a detection level of the S meter is adjusted depending on a level of an output signal of the S meter circuit.

20. The tuner according to claim 19 , wherein

the pseudo sine wave generated in the pseudo sine wave generation circuit has a level change of two steps respectively on both positive and negative sides, and

the pseudo sine wave generation circuit generates two rectangular waves that have a one-step level change on both positive and negative sides, and adds the two rectangular waves to generate the pseudo sine wave having a level change of two steps respectively on both positive and negative sides.

Assignments (4)
RELEASE OF SECURITY INTEREST IN PATENTS RECORDED AT REEL 038620, FRAME 0087 Recorded Jun 22, 2023
From: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
To: FAIRCHILD SEMICONDUCTOR CORPORATION; SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Reel/Frame 064070/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE INCORRECT PATENT NUMBER 5859768 AND TO RECITE COLLATERAL AGENT ROLE OF RECEIVING PARTY IN THE SECURITY INTEREST PREVIOUSLY RECORDED ON REEL 038620 FRAME 0087. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY INTEREST. Recorded Aug 25, 2016
From: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
To: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
Reel/Frame 039853/0001 →
SECURITY INTEREST Recorded Apr 15, 2016
From: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
To: DEUTSCHE BANK AG NEW YORK BRANCH
Reel/Frame 038620/0087 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 15, 2013
From: KANZAWA, TOMOYA; KURIHARA, SHINJI; HORIKOSHI, KATU
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Reel/Frame 030795/0857 →
Priority Claims (1)
JP 2012-098023 · Apr 23, 2012 · national
Continuity (1)
Related Publication 20130285714A1 · Oct 31, 2013