IP Library › Granted Patent US 8,867,290
Granted Patent B2
US 8,867,290 · App. 14/160,158 · Granted Oct 21, 2014

Apparatuses, integrated circuits, and methods for measuring leakage current

Inventor: Shigekazu Yamada (Tokyo, JP)
Assignee: Micron Technology, Inc.
G11C29/025G11C2029/1202G11C2029/5006G11C8/08
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 8,867,290
App. No.
14/160,158
Granted
Oct 21, 2014
Kind
B2
Abstract

Methods, apparatuses, and integrated circuits for measuring leakage current are disclosed. In one such example method, a word line is charged to a first voltage, and a measurement node is charged to a second voltage, the second voltage being less than the first voltage. The measurement node is proportionally coupled to the word line. A voltage on the measurement node is compared with a reference voltage. A signal is generated, the signal being indicative of the comparison. Whether a leakage current of the word line is acceptable or not can be determined based on the signal.

Claims (34)

1. A method, comprising:

comparing a voltage of a measurement node with a reference voltage to determine whether leakage of a word line exceeds a threshold;

compensating for noise encountered on the word line; and

providing a signal indicative of the comparison.

2. The method of claim 1 , wherein the noise encountered on the word line is introduced by a switch transitioning from conductive to non-conductive.

3. The method of claim 2 , wherein compensating for noise encountered on the word line comprises transitioning a compensation switch from non-conductive to conductive.

4. The method of claim 2 , wherein compensating for noise further comprises compensating for a decrease in voltage due to the switch transition.

5. The method of claim 1 , wherein the signal indicates failing a word line leakage test responsive to the leakage of the word line exceeding the threshold.

6. An apparatus, comprising:

a word line leakage measurement system coupled to word lines of a memory, the word line leakage measurement system including a comparator configured to compare a voltage of a measurement node to a reference voltage to test for leakage current, and further including a compensation circuit configured to compensate for noise from decoupling the measurement node from a supply voltage source;

wherein the word line leakage measurement system is configured to automatically runs series of leakage tests for the word lines of the memory.

7. The apparatus of claim 6 , further comprising a state machine coupled to the word line leakage measurement system.

8. The apparatus of claim 7 wherein the state machine is configured to control the series of leakage tests.

9. The apparatus of claim 6 , wherein the word line leakage measurement system is internal to the memory.

10. The apparatus of claim 9 , further comprising one or more input/output nodes coupled to the word line leakage measurement system.

11. The apparatus of claim 10 , wherein results of the series of leakage tests are accessible externally through the one or more input/output nodes.

12. The apparatus of claim 6 , wherein the series of leakage tests indicate whether leakage of a word line of the memory exceeds a threshold.

13. The apparatus of claim 6 wherein the word line leakage measurement system further includes a capacitive voltage divider coupled to the measurement node.

14. The apparatus of claim 6 wherein the word line leakage measurement system further includes a proportioning circuit coupled to the measurement node.

15. The apparatus of claim 6 wherein the compensation circuit of the word line leakage measurement system comprises a switch.

16. A method comprising:

decoupling a word line charged to a first voltage from a first voltage source;

decoupling a measurement node charged to a second voltage from a supply voltage source;

compensating for noise on the word line caused by decoupling the measurement node;

comparing a voltage on the measurement node with a reference voltage; and

providing a signal having a value based on the comparison.

17. The method of claim 16 , further comprising:

capacitively coupling the word line to the measurement node; and

capacitively coupling the measurement node to ground.

18. The method of claim 16 , wherein decoupling the measurement node from the supply voltage comprises transitioning a switch from being conductive to being non-conductive and wherein compensating for noise on the word line caused by decoupling the measurement node comprises transitioning another switch coupled to the measurement node from being non-conductive to being conductive.

19. The method of claim 16 , further comprising:

decoupling an adjacent word line at ground concurrently with decoupling the word line charged to the first voltage from the first voltage source.

20. The method of claim 16 , further comprising:

decoupling other word lines, decoupling other measurement nodes, compensating for noise on the other word lines, comparing a respective voltage on the other measurement nodes with the reference voltage, and providing a respective signal having a value based on the respective comparison.

Assignments (7)
RELEASE OF SECURITY INTEREST Recorded Nov 12, 2019
From: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.; MICRON SEMICONDUCTOR PRODUCTS, INC.
Reel/Frame 051028/0001 →
RELEASE OF SECURITY INTEREST Recorded Oct 9, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.
Reel/Frame 050937/0001 →
RELEASE OF SECURITY INTEREST Recorded Aug 23, 2018
From: U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.
Reel/Frame 047243/0001 →
SECURITY INTEREST Recorded Jul 13, 2018
From: MICRON TECHNOLOGY, INC.; MICRON SEMICONDUCTOR PRODUCTS, INC.
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 047540/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REPLACE ERRONEOUSLY FILED PATENT #7358718 WITH THE CORRECT PATENT #7358178 PREVIOUSLY RECORDED ON REEL 038669 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY INTEREST. Recorded Jun 8, 2017
From: MICRON TECHNOLOGY, INC.
To: U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT
Reel/Frame 043079/0001 →
PATENT SECURITY AGREEMENT Recorded Jun 2, 2016
From: MICRON TECHNOLOGY, INC.
To: MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL AGENT
Reel/Frame 038954/0001 →
SECURITY INTEREST Recorded May 12, 2016
From: MICRON TECHNOLOGY, INC.
To: U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT
Reel/Frame 038669/0001 →
Continuity (2)
Continuation 13282308 · Oct 26, 2011
Related Publication 20140133249A1 · May 15, 2014