IP Library Granted Patent US 8,891,235
Granted Patent B2
US 8,891,235 · App. 13/539,279 · Granted Nov 18, 2014

Thermal interface for multi-chip packages

Inventors: Joseph F. Walczyk (Tigard, OR); Jin Yang (Portland, OR); James G. Maveety (Campbell, CA); Todd P. Albertson (Warren, OR); Ashish Gupta (Chandler, AZ); Jin Pan (Portland, OR); Arun Krishnamoorthy (Portland, OR)
Assignee: Intel Corporation
F28F9/007H05K7/205
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Quick Facts
Patent No.
US 8,891,235
App. No.
13/539,279
Granted
Nov 18, 2014
Kind
B2
Abstract

A thermal interface unit includes a pedestal, a first contact surface below the pedestal to interface with a first die and a flat spring to enable the first contact surface to adapt to a variable height of a first die of a multi-chip package (MCP).

Claims (57)

1. A thermal interface unit, comprising:

a pedestal;

a first contact surface below the pedestal to interface with a first die; and

a flat spring to enable the first contact surface to adapt to a variable height of a first die of a multi-chip package (MCP).

2. The thermal interface unit of claim 1 further comprising a fluid channel embedded in the pedestal above the flat spring to enable a flow of cooling fluid through the pedestal to remove heat from the first die.

3. The thermal interface unit of claim 2 wherein the flat spring comprises a fluid channel to enable the cooling fluid to flow through the pedestal and the flat spring.

4. The thermal interface unit of claim 3 wherein the flat spring includes a heat sink to increase cooling capacity.

5. The thermal interface unit of claim 2 further comprising a second contact surface below the pedestal to interface with a second die of the MCP.

6. The thermal interface unit of claim 5 wherein the first die has a first height and the second die has a second height different from the first height.

7. The thermal interface unit of claim 6 wherein the flat spring compresses to compensate for the difference between the first height and the second height.

8. The thermal interface unit of claim 5 wherein the first and second contact surfaces are heat spreaders.

9. The thermal interface unit of claim 5 wherein the first die is a satellite die and the second die is a central processing unit (CPU) die.

10. The thermal interface unit of claim 2 further comprising:

a third contact surface below the pedestal to interface with a third die;

a second flat spring to enable the third contact surface to adapt to a variable height of the third die of the MCP; and

a second fluid channel embedded in the pedestal above the second flat spring.

11. A thermal interface module comprising:

a thermal head;

a first thermal interface unit, including:

a pedestal;

a first contact surface below the pedestal to interface with a first die; and

a flat spring to enable the first contact surface to adapt to a variable height of a first die of a multi-chip package (MCP); and

a first retainer to constrain the first thermal interface unit.

12. The thermal interface module of claim 10 wherein the first thermal interface unit further comprises a fluid channel embedded in the pedestal above the flat spring to enable a flow of cooling fluid through the pedestal to remove heat from the first die.

13. The thermal interface module of claim 12 wherein the flat spring comprises a fluid channel to enable the cooling fluid to flow through the pedestal and the flat spring.

14. The thermal interface module of claim 13 wherein the flat spring includes a heat sink to increase cooling capacity.

15. The thermal interface module of claim 13 wherein the first thermal interface unit further comprises a second contact surface below the pedestal to interface with a second die of the MCP.

16. The thermal interface module of claim 15 wherein the first die has a first height and the second die has a second height different from the first height.

17. The thermal interface module of claim 16 wherein the flat spring compresses to compensate for the difference between the first height and the second height.

18. The thermal interface module of claim 15 wherein the first die is a satellite die and the second die is a central processing unit (CPU) die.

19. The thermal interface module of claim 13 further comprising:

a second thermal interface unit, including:

a third contact surface below the pedestal to interface with a third die;

a second flat spring to enable the third contact surface to adapt to a variable height of the third die of the MCP; and

a second fluid channel embedded in the pedestal above the second flat spring

a second retainer to constrain the second thermal interface unit.

20. A thermal interface unit, comprising:

a pedestal; and

a contact surface below the pedestal including an interface to elastically yield to conform to an irregular surface on a die on a multi-chip package (MCP).

21. The thermal interface unit of claim 20 wherein the interface comprises a thin film contacting surface.

22. The thermal interface unit of claim 21 wherein the contact surface comprises a cavity behind the thin film contacting surface.

23. The thermal interface unit of claim 22 wherein the cavity is filled with a liquid metal to enhance heat transfer to the pedestal.

24. The thermal interface unit of claim 20 wherein the interface comprises a Beryllium-Copper material.

25. The thermal interface unit of claim 20 wherein the interface comprises a Nickel-Titanium material.

26. A system comprising:

a multi-chip package (MCP) including:

a first die having a first height; and

a second die having a second height; and

a thermal interface unit, comprising:

a pedestal;

a first contact surface below the pedestal to interface with the first die;

a first flat spring to enable the first contact surface to adapt to a variable height of the first die; and

a second contact surface below the pedestal to interface with the second die.

27. The system of claim 26 further comprising a fluid channel embedded in the pedestal above the flat spring to enable a flow of cooling fluid through the pedestal to remove heat from the first die.

28. The system of claim 26 wherein the first die has a first height and the second die has a second height different from the first height.

29. The system of claim 28 wherein the flat spring compresses to compensate for the difference between the first height and the second height.

30. The system of claim 26 wherein the first die is a satellite die and the second die is a central processing unit (CPU) die.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 14, 2012
From: WALCZYK, JOSEPH F.; YANG, JIN; MAVEETY, JAMES G.; ALBERTSON, TODD P.; GUPTA, ASHISH; PAN, JIN; KRISHNAMOORTHY, ARUN
To: INTEL CORPORATION
Reel/Frame 028984/0008 →
Continuity (1)
Related Publication 20140002994A1 · Jan 2, 2014