Semiconductor device comprising a spacer wherein the spacer has an opening through which a pixel electrode is connected to a first transistor
In an active matrix type liquid crystal display device, in which functional circuits such as a shift register circuit and a buffer circuit are incorporated on the same substrate, an optimal TFT structure is provided along with the aperture ratio of a pixel matrix circuit is increased. There is a structure in which an n-channel TFT, with a third impurity region which overlaps a gate electrode, is formed in a buffer circuit, etc., and an n-channel TFT, in which a fourth impurity region which does not overlap the gate electrode, is formed in a pixel matrix circuit. A storage capacitor formed in the pixel matrix circuit is formed by a light shielding film, a dielectric film formed on the light shielding film, and a pixel electrode. Al is especially used in the light shielding film, and the dielectric film is formed anodic oxidation process, using an Al oxide film.
1. A semiconductor device comprising:
a first transistor;
a first insulating film over the first transistor;
a light shielding film over and in contact with the first insulating film;
a second insulating film over the light shielding film;
a spacer over the second insulating film, the spacer being in contact with the first insulating film; and
a pixel electrode over the spacer, the pixel electrode being in contact with the second insulating film,
wherein the spacer covers a corner portion of the second insulating film,
wherein a first storage capacitor is formed by the light shielding film, the second insulating film, and the pixel electrode, and
wherein the pixel electrode is connected to the first transistor through an opening in the spacer.
2. The semiconductor device according to claim 1 ,
wherein the second insulating film is a dielectric film.
3. The semiconductor device according to claim 1 ,
wherein the second insulating film is formed by oxidizing the light shielding film.
4. The semiconductor device according to claim 1 ,
wherein the first transistor comprises a channel forming region and an LDD region.
5. A semiconductor device comprising:
a first transistor including a semiconductor film and a gate electrode;
a first insulating film over the first transistor;
a light shielding film over and in contact with the first insulating film;
a second insulating film over the light shielding film;
a spacer over the second insulating film, the spacer being in contact with the first insulating film; and
a pixel electrode over the spacer, the pixel electrode being in contact with the second insulating film,
wherein the spacer covers a corner portion of the second insulating film,
wherein a first storage capacitor is formed by the light shielding film, the second insulating film, and the pixel electrode, and
wherein the pixel electrode is connected to the first transistor through an opening in the spacer.
6. The semiconductor device according to claim 5 ,
wherein the second insulating film is a dielectric film.
7. The semiconductor device according to claim 5 ,
wherein the second insulating film is formed by oxidizing the light shielding film.
8. The semiconductor device according to claim 5 ,
wherein the semiconductor film comprises a channel forming region and an LDD region, and
wherein the gate electrode is located over the semiconductor film.
9. The semiconductor device according to claim 1 ,
wherein the spacer is in contact with an upper surface and a side surface of the second insulating film.
10. The semiconductor device according to claim 5 ,
wherein the spacer is in contact with an upper surface and a side surface of the second insulating film.
11. The semiconductor device according to claim 1 ,
wherein the spacer covers a corner portion of the light shielding film with the second insulating film interposed therebetween.
12. The semiconductor device according to claim 5 ,
wherein the spacer covers a corner portion of the light shielding film with the second insulating film interposed therebetween.
13. The semiconductor device according to claim 1 ,
wherein the pixel electrode connected to a drain wiring of the first transistor.
14. The semiconductor device according to claim 5 ,
wherein the pixel electrode connected to a drain wiring of the first transistor.
15. The semiconductor device according to claim 4 ,
wherein an impurity concentration of the LDD region is 1×10 19 atoms/cm 3 to 1×10 21 atoms/cm 3 .
16. The semiconductor device according to claim 8 , wherein an impurity concentration of the LDD region is 1×10 19 atoms/cm 3 to 1×10 21 atoms/cm 3 .