IP Library › Granted Patent US 8,906,798
Granted Patent B2
US 8,906,798 · App. 13/714,828 · Granted Dec 9, 2014

Methods of manufacturing stress buffer structures in a mounting structure of a semiconductor device

Inventors: Tzu-Yu Wang (Taipei, TW); Tzu-Wei Chiu (Hsinchu, TW); Shin-Puu Jeng (Hsinchu, TW)
Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
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Quick Facts
Patent No.
US 8,906,798
App. No.
13/714,828
Granted
Dec 9, 2014
Kind
B2
Abstract

A mounting structure for a semiconductor device is formed to include a stepwise stress buffer layer under a stepwise UBM structure.

Claims (71)

1. A method of manufacturing a mounting structure for a semiconductor device having an active surface, said method comprising:

forming a bonding pad over the active surface of the semiconductor device;

forming a stress buffer layer having a stepwise sidewall over a peripheral portion of the bonding pad, while leaving a middle portion of the bonding pad exposed;

forming an under-bump metallurgy (UBM) layer over the exposed middle portion of the bonding pad and over the stepwise wall of the stress buffer layer, such that said UBM layer conforms in shape to said stepwise wall; and

forming a solder bump over the UBM layer;

wherein said forming the bonding pad comprises forming the bonding pad to have a stepwise configuration which defines at least partially the stepwise sidewall of the stress buffer layer when the stress buffer layer is formed over the bonding pad.

2. The method of claim 1 , further comprising:

patterning the stress buffer layer to have a stepwise configuration which defines the stepwise sidewall of the stress buffer layer.

3. The method of claim 1 , further comprising, before forming said stress buffer layer:

forming an upper passivation layer over the active surface and the bonding pad; and

patterning the upper passivation layer to have a stepwise configuration which defines at least partially the stepwise sidewall of the stress buffer layer when the stress buffer layer is formed over the upper passivation layer.

4. The method of claim 1 , further comprising, before forming said bonding pads:

forming a lower passivation layer over the active surface; and

patterning the lower passivation layer to have a stepwise configuration which defines the corresponding stepwise configuration of the bonding pad when the bonding pad is formed over the lower passivation layer.

5. The method of claim 1 , wherein

said method further comprises forming a passivation layer over the active surface and the bonding pad to have a further stepwise configuration at least partially conforming in shape to the stepwise configuration of the bonding pad, and

the stress buffer layer is formed over the passivation layer to have the stepwise sidewall at least partially conforming in shape to the stepwise configurations of the bonding pad and the passivation layer.

6. The method of claim 5 , wherein

the stress buffer layer is formed to have the stepwise wall comprising an upper step and a lower step, and

a height of the upper step is equal to or higher than a height of the lower step.

7. The method of claim 1 , wherein the stress buffer layer is formed to have the stepwise wall comprising more than two steps.

8. The method of claim 1 , wherein

the bonding pad comprises:

a middle portion,

a peripheral portion raised relative to the middle portion, and

a sidewall connecting an upper surface of the middle portion and an upper surface of the raised peripheral portion;

the method further comprises

forming a passivation layer over at least a portion of the raised peripheral portion of the bonding pad; and

the stress buffer polymer layer is formed over the passivation layer and in direct contact with the sidewall of the bonding pad.

9. The method according to claim 8 , wherein the stress buffer layer is formed to be in direct contact with the upper surface of the raised peripheral portion of the bonding pad.

10. The method of claim 8 , wherein the passivation layer is formed to comprise two steps corresponding to two steps of the stepwise wall of the stress buffer layer.

11. The method of claim 1 , wherein the stress buffer layer comprises at least one selected from the group consisting of polybenzoxazole (PBO), epoxy-based polymers, and phenol-based polymers.

12. A method of manufacturing a mounting structure for a semiconductor device having an active surface, said method comprising:

forming a lower passivation layer over the active surface;

forming a bonding pad over the active surface and the lower passivation layer, the bonding pad having a stepwise configuration defined by the lower passivation layer;

forming an upper passivation layer over the active surface and the bonding pad, while leaving a middle portion of the bonding pad exposed;

forming a stress buffer layer over the upper passivation layer and the exposed middle portion of the bonding pad, without completely covering the middle portion of the bonding pad, the stress buffer layer having a stepwise sidewall corresponding at least partially to the stepwise configuration of the bonding pad; and

forming an under-bump metallurgy (UBM) layer over the exposed middle portion of the bonding pad and over the stepwise wall of the stress buffer layer, such that said UBM layer conforms in shape to said stepwise wall, wherein

the upper passivation layer is formed by one selected from the group consisting of a first process, a second process and a third process;

the first process comprises:

depositing a layer of passivation material over the active surface and the bonding pad;

performing a first etching to form an opening in the deposited layer of passivation material, without exposing the middle portion of the bonding pad; and

performing a second etching to enlarge a diameter of the opening in the deposited layer of passivation material and to expose the middle portion of the bonding pad;

the second process comprises:

forming a layer of passivation material over the active surface and the bonding pad, the layer of passivation material having an opening exposing the middle portion of the bonding pad; and

partially removing a thickness of the layer of passivation material around the opening; and

the third process comprises:

forming a first layer of passivation material over the active surface and the bonding pad, the first layer of passivation material having an opening exposing the middle portion of the bonding pad;

forming a second layer of passivation material over the first layer of passivation material and in the opening; and

removing the second layer of passivation material from within and around the opening.

13. The method of claim 12 , further comprising:

forming a solder bump over the UBM layer.

14. The method of claim 12 , wherein the stress buffer layer comprises at least one selected from the group consisting of polybenzoxazole (PBO), epoxy-based polymers, and phenol-based polymers.

15. The method of claim 12 , wherein the stress buffer layer comprises at least one selected from the group consisting of polyimide and benzocyclobutene (BCB).

16. A method of manufacturing a mounting structure for a semiconductor device having an active surface, said method comprising:

forming a lower passivation layer over the active surface;

forming a bonding pad over the active surface and the lower passivation layer, the bonding pad having a stepwise configuration defined by the lower passivation layer;

forming an upper passivation layer over the active surface and the bonding pad, while leaving a middle portion of the bonding pad exposed;

forming a stress buffer layer over the upper passivation layer and the exposed middle portion of the bonding pad, without completely covering the middle portion of the bonding pad, the stress buffer layer having a stepwise sidewall corresponding at least partially to the stepwise configuration of the bonding pad; and

forming an under-bump metallurgy (UBM) layer over the exposed middle portion of the bonding pad and over the stepwise wall of the stress buffer layer, such that said UBM layer conforms in shape to said stepwise wall;

wherein said forming the lower passivation layer comprises:

depositing a layer of passivation material over the active surface; and

patterning the deposited layer of passivation material into the lower passivation layer having a further stepwise configuration which defines the stepwise configuration of the bonding pad when the bonding pad is formed over the lower passivation layer.

17. The method of claim 16 , wherein said forming the upper passivation layer comprises:

depositing a further layer of passivation material over the active surface and the bonding pad;

performing a first etching to form an opening in the deposited further layer of passivation material, without exposing the middle portion of the bonding pad;

performing a second etching to enlarge a diameter of the opening in the deposited further layer of passivation material and to expose the middle portion of the bonding pad.

18. The method of claim 16 , further comprising:

forming a solder bump over the UBM layer.

19. The method of claim 16 , wherein the stress buffer layer comprises at least one selected from the group consisting of polybenzoxazole (PBO), epoxy-based polymers, and phenol-based polymers.

20. The method of claim 16 , wherein the stress buffer layer comprises at least one selected from the group consisting of polyimide and benzocyclobutene (BCB).

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 14, 2012
From: WANG, TZU-YU; CHIU, TZU-WEI; JENG, SHIN-PUU
To: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
Reel/Frame 029470/0555 →
Continuity (2)
Division 12697473 · Feb 1, 2010
Related Publication 20130109169A1 · May 2, 2013