IP Library Granted Patent US 8,969,210
Granted Patent B2
US 8,969,210 · App. 13/232,160 · Granted Mar 3, 2015

Plasma etching apparatus, plasma etching method, and semiconductor device manufacturing method

Inventors: Toshihisa Nozawa (Miyagi, JP); Masaru Sasaki (Miyagi, JP); Jun Hashimoto (Albany, NY); Shota Yoshimura (Miyagi, JP); Toshihisa Ozu (Miyagi, JP); Tetsuya Nishizuka (Beaverton, OR)
Assignee: Tokyo Electron Limited
H01L21/3065H01J37/32192H01J37/32706H01L21/31116H01L21/76224H01L21/76897H01L29/6653H01L29/6656
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Quick Facts
Patent No.
US 8,969,210
App. No.
13/232,160
Granted
Mar 3, 2015
Kind
B2
Abstract

There is provided a plasma etching apparatus provided for performing an etching in a desirable shape. The plasma etching apparatus includes a processing chamber 12 for performing a plasma process on a target substrate W; a gas supply unit 13 for supplying a plasma processing gas into the processing chamber 12 ; a supporting table positioned within the processing chamber 12 and configured to support the target substrate thereon; a microwave generator 15 for generating a microwave for plasma excitation; a plasma generation unit for generating plasma within the processing chamber 12 by using the generated microwave; a pressure control unit for controlling a pressure within the processing chamber 12 ; a bias power supply unit for supplying AC bias power to the supporting table 14 ; and a control unit for controlling the AC bias power by alternately repeating supply and stop of the AC bias power.

Claims (38)

1. A plasma etching method for performing an etching process on a target substrate with generated plasma by using a plasma etching apparatus including a processing chamber configured to perform therein a plasma process on the target substrate; a gas supply unit configured to supply a plasma processing gas into the processing chamber; a supporting table positioned within the processing chamber and configured to support the target substrate thereon; a microwave generator configured to generate a microwave for plasma excitation; a plasma generation unit configured to generate plasma within the processing chamber by using the microwave generated by the microwave generator; and a pressure control unit configured to control a pressure within the processing chamber, the plasma etching method comprising:

forming a gate insulating film layer, a gate electrode layer and a gate side wall on a silicon substrate,

forming a spacer layer to cover the gate insulating film layer, the gate electrode layer and the gate side wall, the spacer layer including an upper region formed on the gate electrode layer, a side region formed on a side surface of the gate side wall, and an end region formed on a horizontal side of the side region on the silicon substrate,

performing a first etching process on the spacer layer until just before the spacer layer on the end region is completely removed, and

performing a second etching process on the spacer layer so that the spacer layer is completely removed from the end region,

wherein in the second etching process, an AC bias power is controlled by alternately repeating supply and stop of the AC bias power,

a protective film is formed on the spacer layer when the AC bias power is in an OFF state,

a thickness of the protective film is about 100 Å or less,

a duty ratio (a/b) of a supply time (a) of the AC bias power to a total time (b) of the AC bias power in the second etching process is in a range of from about 0.18 to about 0.75, and

an ON/OFF frequency of the AC bias power in the second etching process is in a range of from about 5 Hz to about 100 Hz.

2. The plasma etching method of claim 1 , wherein a duty ratio (a/b) of a supply time (a) of the AC bias power to a total time (b) of the AC bias power is about 0.75.

3. A method for manufacturing a semiconductor device by performing an etching process by using a silicon nitride mask formed on a silicon substrate supported on a supporting table, the method comprising:

forming a gate insulating film layer, a gate electrode layer and a gate side wall on a silicon substrate,

forming a spacer layer to cover the gate insulating film layer, the gate electrode layer and the gate side wall, the spacer layer including an upper region formed on the gate electrode layer, a side region formed on a side surface of the gate side wall, and an end region formed on a horizontal side of the side region on the silicon substrate,

supplying a plasma processing gas with a ratio of a gas containing oxygen atoms to the whole plasma processing gas in a range of from about 0.05% to about 5% when etching the silicon substrate;

performing a first etching process on the spacer layer until just before the spacer layer on the end region is completely removed;

performing a second etching process on the spacer layer so that the spacer layer is completely removed from the end region; and

controlling an AC bias power supplied to the supporting table by adjusting a duty ratio (a/b) of a supply time (a) of the AC bias power from a bias power supply unit to a total time (b) including the supply time (a) and a stop time of the AC bias power to be in a range of from about 0.18 to about 0.75,

wherein in the second etching process, an AC bias power is controlled by alternately repeating supply and stop of the AC bias power,

a protective film is formed on the spacer layer when the AC bias power is in an OFF state,

a thickness of the protective film is about 100 Å or less, and

an ON/OFF frequency of the AC bias power in the second etching process is in a range of from about 5 Hz to about 100 Hz.

4. The method for manufacturing a semiconductor device of claim 3 , wherein the duty ratio is about 0.75.

5. A plasma etching method for performing a plasma etching process on a target substrate supported on a supporting table, the method comprising:

forming a gate insulating film layer, a gate electrode layer and a gate side wall on a silicon substrate,

forming a spacer layer to cover the gate insulating film layer, the gate electrode layer and the gate side wall, the spacer layer including an upper region formed on the gate electrode layer, a side region formed on a side surface of the gate side wall, and an end region formed on a horizontal side of the side region on the silicon substrate,

generating plasma by supplying into a processing chamber an etching gas and a gas capable of oxidizing and modifying a reaction by-product with radicals;

performing a first etching process on the spacer layer until just before the spacer layer on the end region is completely removed;

performing a second etching process on the spacer layer so that the spacer layer is completely removed from the end region;

oxidizing and modifying a deposited reaction by-product with radicals; and

controlling a deposit amount of the reaction by-product by adjusting a duty ratio (a/b) of a supply time (a) of an AC bias power to a total time (b) of the AC bias power and by adjusting an ON/OFF frequency of the bias power,

wherein in the second etching process, an AC bias power is controlled by alternately repeating supply and stop of the AC bias power,

a protective film is formed on the spacer layer when the AC bias power is in an OFF state,

a thickness of the protective film is about 100 Å or less,

the duty ratio (a/b) in the second etching process is in a range of from about 0.18 to about 0.75,

the AC bias power is supplied to the supporting table for supporting the target substrate, and the total time (b) includes the supply time (a) and a stop time of the AC bias power, and

the ON/OFF frequency of the AC bias power is in a range of from about 5 Hz to about 100 Hz.

6. The plasma etching method of claim 5 , wherein the duty ratio is about 0.75.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 4, 2011
From: NOZAWA, TOSHIHISA; SASAKI, MASARU; HASHIMOTO, JUN; YOSHIMURA, SHOTA; OZU, TOSHIHISA; NISHIZUKA, TETSUYA
To: TOKYO ELECTRON LIMITED
Reel/Frame 027010/0808 →
Priority Claims (1)
JP 2010-206536 · Sep 15, 2010 · national
Continuity (1)
Related Publication 20120064726A1 · Mar 15, 2012