ESD protection structure
View Patent ↗A device used as an ESD protection structure, which is a modified N-type LDMOS device is disclosed. A conventional LDMOS includes only one N-type heavily doped region as a drain in an N-type lightly doped region ( 11 ), while the device of the invention includes a P-type heavily doped region ( 22 ) in an N-type lightly doped region ( 11 ), dividing the N-type heavily doped region into two N-type heavily doped regions ( 21, 23 ) unconnected and independent to each other. The N-type heavily doped region ( 21 ) close to the gate ( 14 ) has no picking-up terminal. The N-type heavily doped region ( 23 ) away from the gate ( 14 ) together with the P-type heavily doped region ( 22 ) is picked up and connected to an input/output bonding pad.
1. A device used as an ESD protection structure, comprising: a P-type substrate ( 10 ); a P-type well ( 12 ), formed in the P-type substrate ( 10 ); a gate ( 14 ), formed on the P-type well ( 12 ); an N-type lightly doped region ( 11 ) formed in the P-type well ( 12 ), the N-type lightly doped region ( 11 ) having a first end under the gate ( 14 ); a source and a drain, respectively formed by a first N-type heavily doped region ( 162 ) in the P-type well ( 12 ) at a first end of the gate and a second N-type heavily doped region ( 23 ) in the N-type lightly doped region ( 11 ) between a second end of the gate and a second end of the N-type lightly doped region ( 11 ); a first isolation structure ( 131 ), formed in the P-type well ( 12 ) and on one side of the source away from the gate; a first P-type heavily doped region ( 161 ), formed between the first isolation structure ( 131 ) and the first N-type heavily doped region ( 162 ); a second isolation structure ( 133 ), formed in the N-type lightly doped region ( 11 ) and under the second end of the gate ( 14 ); a third isolation structure ( 134 ), partly or entirely formed in the N-type lightly doped region ( 11 ) and on one side of the drain away from the gate ( 14 ); a third N-type heavily doped region ( 21 ) and a second P-type heavily doped region ( 22 ), formed in the N-type lightly doped region ( 11 ) and between the second end of the gate and the drain, wherein the second P-type heavily doped region ( 22 ) is formed between the third N-type heavily doped region ( 21 ) and the drain, and the first P-type heavily doped region ( 161 ) and the first N-type heavily doped region ( 162 ) are grounded, the gate ( 14 ) is connected to an interior circuit, and the second P-type heavily doped region ( 22 ) and the second N-type heavily doped region ( 23 ) are connected to an input/output bonding pad.
2. The device used as an ESD protection structure according o claim 1 , an electrostatic trigger voltage of which is adjusted through adjusting a distance between a border of the N-type lightly doped region ( 11 ) close to the drain and a border of the drain away from the gate ( 14 ).
3. The device used as an ESD protection structure according claim 1 , further comprising:
a fourth isolation structure ( 132 ), formed in the P-type well ( 12 ) and between the first P-type heavily doped region ( 161 ) and the first N-type heavily doped region ( 162 ).
4. The device used as an ESD protection structure according to claim 1 , further comprising:
spacers ( 15 ), formed on both sides of the gate ( 14 ).
5. The device used as an ESD protection structure according to claim 1 , further comprising:
a fifth isolation structure, formed in the N-type lightly doped region ( 11 ) and between he second P-type heavily doped region ( 22 ) and the third N-type heavily doped region ( 21 ).
6. The device used as an ESD protection structure according to claim 1 , further comprising:
a sixth isolation structure, formed in the N-type lightly doped region ( 11 ) and between the second P-type heavily doped region ( 22 ) and the second N-type heavily doped region ( 23 ).
7. The device used as an ESD protection structure according to claim 1 , wherein. electrostatic voltage breakdown occurs at a border of the N-type lightly doped region ( 11 ) away from the gate ( 14 ), and electrostatic current flows from the second P-type heavily doped region ( 22 ) to the source.