IP Library Granted Patent US 8,993,390
Granted Patent B2
US 8,993,390 · App. 14/277,812 · Granted Mar 31, 2015

Method for fabricating semiconductor device

Inventors: Kuo-Chih Lai (Tainan, TW); Chia Chang Hsu (Kaohsiung, TW); Nien-Ting Ho (Tainan, TW); Bor-Shyang Liao (Kaohsiung, TW); Shu Min Huang (Tainan, TW); Min-Chung Cheng (Chiayi County, TW); Yu-Ru Yang (Hsinchu County, TW)
Assignee: United Microelectronics Corp.
H01L21/76889H01L29/41791H01L29/66795
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Quick Facts
Patent No.
US 8,993,390
App. No.
14/277,812
Granted
Mar 31, 2015
Kind
B2
Abstract

A manufacturing method of a semiconductor device comprises the following steps. First, a substrate is provided, at least one fin structure is formed on the substrate, and a metal layer is then deposited on the fin structure to form a salicide layer. After depositing the metal layer, the metal layer is removed but no RTP is performed before the metal layer is removed. Then a RTP is performed after the metal layer is removed.

Claims (25)

1. A manufacturing method of a semiconductor device, comprising:

providing a substrate, with at least one fin structure on the substrate;

depositing a metal layer on the fin structure to form a silicide layer;

removing the metal layer, wherein no RTP (Rapid Thermal Process) is performed before the metal layer is removed, and;

performing a RTP after the metal layer is removed.

2. The manufacturing method of a semiconductor device of claim 1 , further comprising forming a STI surrounding the fin structure.

3. The manufacturing method of a semiconductor device of claim 1 , further comprising forming an epitaxy layer on the fin structure before depositing the metal layer.

4. The manufacturing method of a semiconductor device of claim 1 , further comprising forming a gate on parts of the fin structure.

5. The manufacturing method of a semiconductor device of claim 4 , wherein the gate comprises a polysilicon gate or a metal gate.

6. The manufacturing method of a semiconductor device of claim 1 , wherein the temperature of the RTP is between 400° C. and 600° C.

7. The manufacturing method of a semiconductor device of claim 1 , further comprising forming a plurality of contacts on the silicide layer.

8. The manufacturing method of a semiconductor device of claim 1 , wherein the contacts comprise slot contacts or pole contacts.

9. A manufacturing method of a semiconductor device, comprising:

providing a substrate, with at least one fin structure on the substrate;

depositing a metal layer on the fin structure to form a silicide layer;

performing a low temperature thermal process after the metal layer is deposited, wherein the temperature of the low temperature thermal process is between 80° C. and 120° C.;

removing the metal layer, and;

performing a RTP after the metal layer is removed.

10. The manufacturing method of a semiconductor device of claim 9 , further comprising forming a STI surrounding the fin structure.

11. The manufacturing method of a semiconductor device of claim 9 , further comprising forming an epitaxy layer on the fin structure before depositing the metal layer.

12. The manufacturing method of a semiconductor device of claim 9 , further comprising forming a gate on parts of the fin structure.

13. The manufacturing method of a semiconductor device of claim 12 , wherein the gate comprises a polysilicon gate or a metal gate.

14. The manufacturing method of a semiconductor device of claim 9 , wherein the temperature of the RTP is between 400° C. and 600° C.

15. The manufacturing method of a semiconductor device of claim 9 , further comprising forming a plurality of contacts on the silicide layer.

16. The manufacturing method of a semiconductor device of claim 9 , wherein the contacts comprise slot contacts or pole contacts.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 1, 2025
From: UNITED MICROELECTRONICS CORP.
To: STELLAR SEMICONDUCTOR JAPAN GK
Reel/Frame 071913/0125 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 15, 2014
From: LAI, KUO-CHIH; HSU, CHIA CHANG; HO, NIEN-TING; LIAO, BOR-SHYANG; HUANG, SHU MIN; CHENG, MIN-CHUNG; YANG, YU-RU
To: UNITED MICROELECTRONICS CORP.
Reel/Frame 032891/0658 →
Continuity (2)
Division 13456238 · Apr 26, 2012
Related Publication 20140248762A1 · Sep 4, 2014