Semiconductor structure having an air-gap region and a method of manufacturing the same

1. A method of manufacturing a semiconductor structure comprising:

removing a portion of a dielectric filler from a first metal-containing layer formed over a semiconductor substrate to define an air-gap region according to a predetermined air-gap pattern, the first metal-containing layer comprising a metal structure and the dielectric filler;

filling the air-gap region with a decomposable filler;

forming a dielectric capping layer over the first metal-containing layer and the decomposable filler;

decomposing the decomposable filler;

forming an insulating layer over the dielectric capping layer;

forming a via plug in the insulating layer, the via plug being formed over the metal structure of the first metal-containing layer without overlapping the air-gap region; and

forming a conductive pad over the insulating layer, the conductive pad being formed without overlapping the air-gap region.

2. The method of claim 1 , further comprising:

selectively forming a metal capping layer on a set of metal structures of the first metal-containing layer.

3. The method of claim 2 , wherein the metal capping layer is deposited using electroless plating.

4. The method of claim 1 , wherein the decomposable filler is a thermally decomposable polymer (TDP).

5. The method of claim 4 , wherein the filling the TDP filler comprises:

performing a spin coating to apply a TDP material over the semiconductor substrate;

curing the TDP material; and

planarizing the TDP material.

6. The method of claim 1 , wherein the decomposing the decomposable filler comprises:

exposing the semiconductor structure to ultraviolet (UV) radiation.

7. The method of claim 1 , wherein the metal structure, the dielectric filler and the decomposable filler comprise co-planar surfaces.

8. A method of preparing a photomask containing an air-gap pattern for forming an air-gap region in a semiconductor device, the method comprising:

laying out a pad pattern corresponding to a set of conductive pads to be formed on the semiconductor device;

laying out a metal structure pattern corresponding to a set of metal structures to be formed in a first metal-containing layer of the semiconductor device;

laying out a via pattern corresponding to a set of via plugs to be formed in a second metal-containing layer of the semiconductor device, the second metal-containing layer being over the first metal-containing layer of the semiconductor device; and

deriving the air-gap pattern according to the pad pattern, the via pattern, and the metal structure pattern,

wherein a pad of the set of conductive pads is formed based on the pad pattern over the second metal-containing layer, and the air-gap pattern is derived so that the via plugs of the set of via plugs and the pad are formed without overlapping the air-gap region.

9. The method of claim 8 , wherein the deriving the air-gap pattern according to the pad pattern, the via pattern, and the metal structure pattern comprises:

extending peripherals of the pad pattern outwardly by a first distance to obtain an extended pad pattern;

extending peripherals of the via pattern outwardly by a second distance to obtain an extended via pattern; and

overlapping and inverting the extended pad pattern, the extended via pattern, and the metal structure pattern to obtain the air-gap pattern.

10. The method of claim 9 , wherein the second distance is between 5 nm and 50 nm.

11. The method of claim 9 , wherein the first distance is between 10 nm and 20 μm.

12. A method of manufacturing a semiconductor structure comprising:

removing a portion of a dielectric filler from a first metal-containing layer formed over a semiconductor substrate to define an air-gap region, the first metal-containing layer comprising a metal structure and the dielectric filler;

filling the air-gap region with a decomposable filler;

forming a dielectric capping layer over the first metal-containing layer and the decomposable filler, wherein the dielectric capping layer is formed at a temperature below a decomposition temperature of the decomposable filler;

decomposing the decomposable filler;

forming an insulating layer over the dielectric capping layer;

forming a via plug in the insulating layer, the via plug being formed over the metal structure of the first metal-containing layer without overlapping the air-gap region; and

forming a conductive pad over the insulating layer, the conductive pad being formed without overlapping the air-gap region.

13. The method of claim 12 , wherein forming the dielectric capping layer comprises forming a dielectric layer having a thickness between 5 nanometers (nm) and 50 nm.

14. The method of claim 12 , further comprising forming a metal capping layer over metal portions of the first metal-containing layer, wherein the metal capping layer is between the dielectric capping layer and a corresponding metal portion.

15. The method of claim 12 , wherein removing the portion of the dielectric filler comprises performing an anisotropic etching of the dielectric filler.

16. The method of claim 12 , wherein decomposing the decomposable filler comprises converting the decomposable filler into a gaseous state, wherein the gaseous state passes through the dielectric capping layer.

17. The method of claim 12 , further comprising forming a second metal-containing layer over the dielectric capping layer.

18. The method of claim 12 , wherein the first metal-containing layer comprises a via different from the via plug, and removing the portion of the dielectric filler comprises defining the air-gap region a minimum horizontal distance from the via.

19. The method of claim 12 , wherein decomposing the decomposable filler comprises laser scanning of the air-gap region.

20. The method of claim 18 , wherein the minimum horizontal distance is less than 50 nm.