IP Library Granted Patent US 9,007,000
Granted Patent B2
US 9,007,000 · App. 14/149,167 · Granted Apr 14, 2015

Electronic circuits for driving series connected light emitting diode strings

Inventors: Gregory Szczeszynski (Hollis, NH); Bassem Alnahas (Manchester, NH); Vijay Mangtani (Nashua, NH)
Assignee: Allegro MicroSystems, LLC
H05B33/0818H05B33/0815H05B33/0827
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Quick Facts
Patent No.
US 9,007,000
App. No.
14/149,167
Granted
Apr 14, 2015
Kind
B2
Abstract

Electronic circuits provide an error signal to control a regulated output voltage signal generated by a controllable DC-DC converter for driving one or more series connected strings of light emitting diodes.

Claims (25)

1. An electronic circuit for driving a plurality of series connected light emitting diode strings with a controllable DC-DC converter, the electronic circuit comprising;

a plurality of current regulators, each having a respective input node and a respective output node, the input node or the output node coupled to an end of a respective one of the plurality of series connected light emitting diode strings, wherein each current regulator is configured to pass a respective predetermined current through the respective one of the plurality of series connected light emitting diode strings to which it is coupled;

a plurality of switches, each having a respective input node, a respective output node, and a respective control node, wherein each one of the input nodes of the plurality of switches is coupled to the input node or the output node of a respective one of the plurality of current regulators, wherein the output nodes of the plurality of switches are coupled together resulting in a composite signal;

a digital channel select circuit coupled to the control nodes of the plurality of switches and configured to close each one of the plurality of switches sequentially and periodically; and

an error amplifier having an input node and an output node, wherein the input node of the error amplifier is coupled to receive the composite signal, wherein the error amplifier is configured to generate an error signal at the output node of the error amplifier.

2. The electronic circuit of claim 1 , wherein the error amplifier is configured to be able to sink a different amount of current than it is able to source.

3. The electronic circuit of claim 1 , wherein the controllable DC-DC converter is coupled to receive the error signal, wherein the controllable DC-DC converter comprises an input node configured to receive a voltage and an output node at which regulated output voltage is generated by the controllable DC-DC converter, wherein the error signal is configured to control the regulated output voltage.

4. The electronic circuit of claim 3 , wherein the controllable DC-DC converter comprises a switching regulator.

5. The electronic circuit of claim 4 , wherein the error amplifier is configured to be able to sink a different amount of current than it is able to source.

6. The electronic circuit of claim 1 , wherein the error amplifier comprises a transconductance amplifier.

7. A method of driving a plurality of series connected light emitting diode strings with a controllable DC-DC converter, the method comprising:

attempting to pass a respective predetermined current through each one of the plurality of series connected light emitting diode strings, resulting in a respective voltage appearing at an end of each one of the plurality of series connected light emitting diode strings;

sampling each one of the voltages sequentially and periodically to generate voltage samples; and

summing the voltage samples to generate an error signal to control the DC-DC converter.

8. The electronic circuit of claim 6 , further comprising a capacitor coupled to the output node of the error amplifier forming a loop filter.

9. The method of claim 7 , wherein the summing the voltage samples comprises:

summing the voltage samples with an error amplifier.

10. The method of claim 9 , wherein the error amplifier comprises a transconductance amplifier.

11. The method of claim 10 , further comprising filtering the error signal to form a loop filter.

12. The method of claim 7 , wherein the controllable DC-DC converter is coupled to receive the error signal, wherein the controllable DC-DC converter comprises an input node configured to receive a voltage and an output node at which regulated output voltage is generated by the controllable DC-DC converter, wherein the error signal is configured to control the regulated output voltage.

13. The method of claim 12 , wherein the controllable DC-DC converter comprises a switching regulator.

14. The method of claim 13 , wherein the summing the voltage samples comprises:

summing the voltage samples with an error amplifier.

15. The method of claim 14 , wherein the error amplifier comprises a transconductance amplifier.

16. The method of claim 15 , further comprising filtering the error signal to form a loop filter.

Assignments (8)
RELEASE OF SECURITY INTEREST IN PATENTS AT REEL 053957/FRAME 0874 Recorded Nov 1, 2023
From: CREDIT SUISSE AG, CAYMAN ISLANDS BRANCH, AS COLLATERAL AGENT
To: ALLEGRO MICROSYSTEMS, LLC
Reel/Frame 065420/0572 →
RELEASE OF SECURITY INTEREST IN PATENTS (R/F 053957/0620) Recorded Jun 22, 2023
From: MIZUHO BANK, LTD., AS COLLATERAL AGENT
To: ALLEGRO MICROSYSTEMS, LLC
Reel/Frame 064068/0360 →
PATENT SECURITY AGREEMENT Recorded Jun 22, 2023
From: ALLEGRO MICROSYSTEMS, LLC
To: MORGAN STANLEY SENIOR FUNDING, INC., AS THE COLLATERAL AGENT
Reel/Frame 064068/0459 →
PATENT SECURITY AGREEMENT Recorded Oct 1, 2020
From: ALLEGRO MICROSYSTEMS, LLC
To: MIZUHO BANK LTD., AS COLLATERAL AGENT
Reel/Frame 053957/0620 →
PATENT SECURITY AGREEMENT Recorded Oct 1, 2020
From: ALLEGRO MICROSYSTEMS, LLC
To: CREDIT SUISSE AG, CAYMAN ISLANDS BRANCH, AS COLLATERAL AGENT
Reel/Frame 053957/0874 →
CHANGE OF NAME Recorded Jun 21, 2017
From: ALLEGRO MICROSYSTEMS, INC.
To: ALLEGRO MICROSYSTEMS, LLC
Reel/Frame 042929/0015 →
CORRECTIVE ASSIGNMENT TO CORRECT THE RECEIVING PARTY NAME AND RECEIVING PARTY POSTAL CODE PREVIOUSLY RECORDED ON REEL 032087 FRAME 0334. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT. Recorded May 3, 2017
From: SZCZESZYNSKI, GREGORY; ALNAHAS, BASSEM; MANGTANI, VIJAY
To: ALLEGRO MICROSYSTEMS, INC.
Reel/Frame 042389/0410 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 30, 2014
From: SZCZESZYNSKI, GREGORY; ALNAHAS, BASSEM; MANGTANI, VIJAY
To: ALLEGRO MICROSYSTEMS, LLC
Reel/Frame 032087/0334 →
Continuity (4)
Division 13428654 · Mar 23, 2012
Division 12267645 · Nov 10, 2008
Provisional Application 60988520 · Nov 16, 2007
Related Publication 20140125236A1 · May 8, 2014