Loading trim address and trim data pairs
Methods of loading trim address and trim data pairs to a trim register array, and apparatus configured to perform such methods. The methods maintain a correspondence between the trim address and the trim data of each trim address and trim data pair in the trim register array. The trim address of a particular trim address and trim data pair corresponds to a storage location of a trim settings array containing trim settings used in performing operations on an array of memory cells. The trim data of the particular trim address and trim data pair corresponds to data to modify a value of the storage location of the trim settings array corresponding to the trim address of the particular trim address and trim data pair.
1. A method, comprising:
loading trim address and trim data pairs to a trim register array; and
maintaining a correspondence between the trim address and the trim data of each trim address and trim data pair in the trim register array;
wherein the trim address of a particular trim address and trim data pair corresponds to a storage location of a trim settings array containing trim settings used in performing operations on an array of memory cells; and
wherein the trim data of the particular trim address and trim data pair corresponds to data to modify a value of the storage location of the trim settings array corresponding to the trim address of the particular trim address and trim data pair.
2. The method of claim 1 , wherein maintaining a correspondence between the trim address and the trim data of each trim address and trim data pair in the trim register array comprises storing portions of the particular trim address and trim data pair in adjacent columns of a particular table of the trim register array.
3. The method of claim 1 , wherein maintaining a correspondence between the trim address and the trim data of each trim address and trim data pair in the trim register array comprises storing portions of the particular trim address and trim data pair in offset storage locations of the trim register array.
4. The method of claim 1 , wherein storing portions of the particular trim address and trim data pair in offset storage locations of the trim register array comprises storing the portions of the particular trim address and trim data pair in different tables of the trim register array in storage locations occurring at a particular column of the trim register array.
5. A method, comprising:
loading a first portion of a trim address and trim data pair to a storage location of a trim register array corresponding to a start address of a received command;
loading a second portion of the trim address and trim data pair to a subsequent storage location of the trim register array; and
determining if the trim address and trim data pair is a last trim address and trim data pair to be loaded to the trim register array in response to the received command;
wherein the trim address of the trim address and trim data pair corresponds to a storage location of a trim settings array containing trim settings used in performing operations on an array of memory cells; and
wherein the trim data of the trim address and trim data pair corresponds to data to modify a value of the storage location of the trim settings array corresponding to the trim address of the trim address and trim data pair.
6. The method of claim 5 , wherein loading a first portion of a trim address and trim data pair comprises loading either a trim address or trim data of the trim address and trim data pair.
7. The method of claim 6 , wherein loading a second portion of the trim address and trim data pair comprises loading a remaining portion of the trim address and trim data pair.
8. The method of claim 5 , further comprising wherein the received command indicates that the start address is presumed to correspond to an initial column of the trim register array.
9. The method of claim 5 , further comprising wherein address information of the received command includes the start address, and wherein the start address corresponds to a particular column of the trim register array.
10. The method of claim 5 , wherein determining if the trim address and trim data pair is a last trim address and trim data pair to be loaded to the trim register array in response to the received command comprises determining if an address of the storage location to which the first portion of the trim address and trim data pair was loaded, or an address of the subsequent storage location to which the second portion of the trim address and trim data pair was loaded, corresponds to a stop address of the received command.
11. The method of claim 5 , wherein determining if the trim address and trim data pair is a last trim address and trim data pair to be loaded to the trim register array in response to the received command comprises determining if a command confirm code was received.
12. The method of claim 5 , wherein loading a second portion of the trim address and trim data pair to a subsequent storage location of the trim register array comprises loading the second portion of the trim address and trim data pair to a subsequent storage location of the trim register array adjacent the storage location to which the first portion of the trim address and trim data pair was loaded.
13. The method of claim 5 , wherein loading a second portion of the trim address and trim data pair to a subsequent storage location of the trim register array comprises loading the second portion of the trim address and trim data pair to a subsequent storage location of the trim register array offset by a fixed amount from the storage location to which the first portion of the trim address and trim data pair was loaded.
14. The method of claim 13 , wherein the fixed amount of the offset is a particular address increment from the storage location to which the first portion of the trim address and trim data pair was loaded.
15. The method of claim 5 , further comprising:
if it is determined that the trim address and trim data pair is not the last trim address and trim data pair to be loaded to the trim register array in response to the received command:
loading a first portion of a subsequent trim address and trim data pair to a subsequent storage location of the trim register array; and
loading a second portion of the subsequent trim address and trim data pair to a subsequent storage location of the trim register array.
16. The method of claim 15 , further comprising:
repeating loading a first portion of a subsequent trim address and trim data pair and loading a second portion of a subsequent trim address and trim data pair in like manner until a most recently loaded trim address and trim data pair is determined to be the last trim address and trim data pair to be loaded to the trim register array in response to the received command.
17. The method of claim 15 , wherein loading a first portion of a subsequent trim address and trim data pair to a subsequent storage location of the trim register array comprises loading the first portion of the subsequent trim address and trim data pair to a subsequent storage location of the trim register array that is adjacent to a storage location of the trim register array to which a second portion of a prior trim address and trim data pair was loaded.
18. The method of claim 17 , wherein loading a second portion of the subsequent trim address and trim data pair to a subsequent storage location of the trim register array comprises loading the second portion of the subsequent trim address and trim data pair to a subsequent storage location of the trim register array that is adjacent to the storage location of the trim register array in which the first portion of the subsequent trim address and trim data pair was loaded.
19. The method of claim 15 , wherein loading a first portion of a subsequent trim address and trim data pair to a subsequent storage location of the trim register array comprises loading the first portion of the subsequent trim address and trim data pair to a subsequent storage location of the trim register array that is adjacent to a storage location of the trim register array to which a first portion of a prior trim address and trim data pair was loaded.
20. The method of claim 17 , wherein loading a second portion of the subsequent trim address and trim data pair to a subsequent storage location of the trim register array comprises loading the second portion of the subsequent trim address and trim data pair to a subsequent storage location of the trim register array that is offset by a fixed amount from the storage location of the trim register array in which the first portion of the subsequent trim address and trim data pair was loaded.
21. A method, comprising:
receiving a command indicating a desire to load trim address and trim data pairs to a trim register array, wherein the command comprises a command code, address information comprising a table address and a start address, and data comprising one or more trim address and trim data pairs;
loading a first portion of a first trim address and trim data pair to a particular table of the trim register array corresponding to the table address of the received command in an initial storage location of the table occurring at a particular column of the table corresponding to the start address of a received command;
loading a second portion of the first trim address and trim data pair to a subsequent storage location of the trim register array selected from the group consisting of a storage location adjacent the initial storage location and a storage location offset from the initial storage location by a particular amount; and
determining if the first trim address and trim data pair is a last trim address and trim data pair of the one or more trim address and trim data pairs of the received command;
wherein the trim address of the first trim address and trim data pair corresponds to a storage location of a trim settings array containing trim settings used in performing operations on an array of memory cells; and
wherein the trim data of the first trim address and trim data pair corresponds to data to modify a value of the storage location of the trim settings array corresponding to the trim address of the first trim address and trim data pair.
22. The method of claim 21 , further comprising:
if it is determined that the first trim address and trim data pair is not the last trim address and trim data pair:
loading a first portion of a subsequent trim address and trim data pair to a subsequent storage location of the trim register array selected from the group consisting of a storage location adjacent a storage location of a second portion of a prior trim address and trim data pair, and a storage location adjacent a storage location of a first portion of the prior trim address and trim data pair; and
loading a second portion of the subsequent trim address and trim data pair to a subsequent storage location of the trim register array selected from the group consisting of a storage location adjacent the storage location of the first portion of the subsequent trim address and trim data pair, and a storage location offset from the storage location of the first portion of the subsequent trim address and trim data pair by the particular amount.
23. The method of claim 22 , further comprising:
repeating loading a first portion of a subsequent trim address and trim data pair and loading a second portion of a subsequent trim address and trim data pair in like manner until a most recently loaded trim address and trim data pair is determined to be the last trim address and trim data pair of the one or more trim address and trim data pairs of the received command.
24. An apparatus, comprising:
an array of memory cells;
a controller;
a trim register array in communication with the controller and comprising a plurality of storage locations for trim addresses of trim address and trim data pairs, and a plurality of storage locations for trim data of trim address and trim data pairs; and
a trim settings array in communication with the controller and comprising a plurality of storage locations for trim settings;
wherein the controller is configured to load trim address and trim data pairs to the trim register array in response to a command received by the apparatus;
wherein the controller is further configured to maintain a correspondence between the trim address and the trim data of each trim address and trim data pair in the trim register array;
wherein the controller is further configured to perform an operation on the array of memory cells using trim settings from the trim settings array; and
wherein the controller is further configured to permit modification of the trim settings array by loading the trim data of a given trim address and trim data pair to a storage location of the trim settings array corresponding to the trim address of the given trim address and trim data pair.
25. An apparatus, comprising:
an array of memory cells;
a controller;
a trim register array in communication with the controller and comprising a plurality of storage locations for trim addresses of trim address and trim data pairs, and a plurality of storage locations for trim data of trim address and trim data pairs; and
a trim settings array in communication with the controller and comprising a plurality of storage locations for trim settings;
wherein the controller is configured to load a first portion of a first trim address and trim data pair to a storage location of the trim register array corresponding to a start address of a command received by the apparatus indicating a desire to load trim address and trim data pairs;
wherein the controller is further configured to load a second portion of the first trim address and trim data pair to a subsequent storage location of the trim register array selected from the group consisting of a storage location adjacent the storage location of the first portion of the first trim address and trim data pair, and a storage location offset from the storage location of the first portion of the first trim address and trim data pair by a particular amount;
wherein the trim address of the first trim address and trim data pair identifies a storage location of the plurality of storage locations in the trim settings array, and wherein the storage location of the plurality of storage locations in the trim settings array identified by the trim address of the first trim address and trim data pair is configured to store the trim data of the first trim address and trim data pair;
wherein the controller is further configured to determine if the first trim address and trim data pair is a last trim address and trim data pair to be loaded to the trim register array in response to the received command; and
wherein, if the controller determines that the first trim address and trim data pair is not the last trim address and trim data pair to be loaded to the trim register array in response to the command, the controller is further configured to:
load a first portion of a subsequent trim address and trim data pair to a subsequent storage location of the trim register array selected from the group consisting of a storage location adjacent a storage location of the second portion of the first trim address and trim data pair, and a storage location adjacent a storage location of the first portion of the first trim address and trim data pair; and
load a second portion of the subsequent trim address and trim data pair to a subsequent storage location of the trim register array selected from the group consisting of a storage location adjacent the storage location of the first portion of the subsequent trim address and trim data pair, and a storage location offset from the storage location of the first portion of the subsequent trim address and trim data pair by the particular amount.
26. The apparatus of claim 25 , wherein the controller is further configured to repeat loading a first portion of a subsequent trim address and trim data pair and loading a second portion of a subsequent trim address and trim data pair in like manner until a most recently loaded trim address and trim data pair is determined to be the last trim address and trim data pair to be loaded to the trim register array in response to the received command.