Method for forming solder resist and substrate for package
The present invention relates to a method for forming solder resist and a substrate for a package. The method for forming solder resist including: forming a first solder resist inner region by primarily coating, exposing, and developing a solder resist on a substrate on which an outer PoP pad and an inner chip pad are formed, and removing the solder resist's outer portion on the substrate's outer region and curing the solder resist's inner portion on the substrate's inner region; forming a plugged SR region which does not expose the substrate; changing a surface roughness by performing a desmear process on a surface of the first solder resist inner region in which the plugged SR region is formed; and forming a second solder resist SMD region which covers an edge of the PoP pad, exposing, and developing the solder resist on the substrate after the desmear process is provided.
1. A substrate for a package comprising:
a substrate;
a circuit pattern formed on the substrate and comprising an outer package-on-package (PoP) pad for mounting an upper package thereon and a chip pad for mounting an inner chip thereon;
a first solder resist (SR) inner region formed by being coated on an inner region of the substrate on which the inner circuit pattern comprising the chip pad is formed, comprising a plugged SR region which does not expose the substrate while exposing the entire upper surface of the chip pad by laser ablation, and desmeared to have a changed surface roughness; and
a second solder resist SMD region formed to cover an edge of the first solder resist inner region and an edge of the POP pad and having a surface roughness different from a surface roughness of the plugged SR region on the first solder resist inner region.
2. The substrate for a package according to claim 1 , wherein the surface roughness of the plugged SR region on the first solder resist inner region is higher than the surface roughness of the second solder resist SMD region.
3. The substrate for a package according to claim 1 , wherein the inner circuit pattern comprising the chip pad further comprises a bump pad formed around the chip pad,
the first solder resist inner region is formed on the inner region of the substrate on which the inner circuit pattern comprising the chip pad and the bump pad is formed, and
the plugged SR region is formed by laser ablation not to expose the substrate while exposing the entire upper surface of the chip pad and the bump pad.
4. The substrate for a package according to claim 1 , wherein a height of the plugged SR region is lower than a height of the upper surface of the chip pad.
5. The substrate for a package according to claim 1 , wherein a height of the second solder resist SMD region is higher than a height of the first solder resist inner region.
6. The substrate for a package according to claim 1 , wherein the first solder resist inner region and the second solder resist SMD region are made of one of a photocurable resin, a thermosetting resin, and photocurable and thermosetting resins.