Semiconductor devices and methods of making the same
In one embodiment, methods for making semiconductor devices are disclosed.
1. A semiconductor device comprising:
a first conductive substrate electrically coupled to a first lead, wherein the first conductive substrate comprises two or more elevated regions on a first side of the first conductive substrate, wherein each of the elevated regions comprises a planar surface on the first side of the first conductive substrate;
a semiconductor die comprising one or more first contact pads, a second contact pad, and a third contact pad, wherein the first contact pads are disposed on a first side of the semiconductor die, and wherein each of the first contact pads are soldered to at least one of the elevated regions such that each of the first contacts pads has two or more linear edges that are each laterally aligned and parallel with at least one edge of the planar surfaces on the elevated regions, and wherein at least one of the first contact pads is soldered to two or more of the elevated regions;
a second lead electrically coupled to the second contact pad of the semiconductor die; and
a third lead electrically coupled to the third contact pad of the semiconductor die.
2. The semiconductor device of claim 1 , wherein the first conductive substrate comprises at least 10 elevated regions.
3. The semiconductor device of claim 2 , wherein a number of the elevated regions on the first side of the first conductive substrate is greater than a number of the elevated regions soldered to the first contact pads of the semiconductor die.
4. The semiconductor device of claim 1 , further comprising a second conductive substrate soldered to the second contact pad, and wherein the second conductive substrate is electrically coupled to the second lead.
5. The semiconductor device of claim 1 , wherein a number of the elevated regions on the first side of the first conductive substrate is greater than a number of the contact pads soldered to the first conductive substrate.
6. The semiconductor device of claim 1 , wherein no more than about 95% of a total surface area of the first contact pads is soldered to the elevated regions.
7. The semiconductor device of claim 1 , wherein at least a portion of the elevated regions on the first side of the conductive substrate have different sizes.
8. The semiconductor device of claim 1 , wherein the elevated regions are evenly spaced along a first direction.
9. The semiconductor device of claim 1 , wherein the elevated regions on the first side of the first conductive substrate are arranged in an array having multiple rows and multiple columns, each of the rows having the same number of elevated regions and each of the columns having the same number of elevated regions.
10. The semiconductor device of claim 1 , wherein at least one of the first contact pads is soldered to three or more of the elevated regions.
11. A semiconductor device comprising:
a lead frame comprising a first contact electrically coupled to a first lead of the semiconductor device;
a conductive clip electrically coupled to a second lead on the semiconductor device, wherein the conductive clip comprises two or more elevated regions on a first side of the conductive clip, wherein each of the elevated regions comprises a planar surface on the first side of the conductive clip; and
a semiconductor die comprising:
a first contact pad on a first side of the semiconductor die, wherein the first contact pad is soldered to the first contact on the lead frame;
one or more second contact pads on a second a side of the semiconductor die, wherein each of the second contact pads are soldered to at least one of the elevated regions on the first side of the conductive clip such that each of the second contacts pads has two or more linear edges that are each laterally aligned and parallel with at least one edge of the planar surfaces on the elevated regions, and wherein at least one of the second contact pads is soldered to two or more of the elevated regions; and
a third contact pad on the semiconductor die, wherein the third contact pad is electrically coupled to a third lead of the semiconductor device.
12. The semiconductor device of claim 1 , wherein at least one of the elevated regions on the first conductive substrate is not soldered to the semiconductor die.
13. The semiconductor device of claim 1 , wherein at least one of the elevated regions on the first conductive substrate has only a portion of the planar surface soldered to the first contact pads.
14. The semiconductor device of claim 1 , wherein the elevated regions on the first conductive substrate have different dimensions.
15. The semiconductor device of claim 1 , wherein the planar surfaces on the elevated regions have a polygonal shape.
16. The semiconductor device of claim 11 , wherein at least one of the second contact pads is soldered to three or more of the elevated regions.
17. The semiconductor device of claim 11 , wherein the first contact of the lead frame comprises one or more second elevated regions on a first side of the first contacts of the lead frame, wherein each of the second elevated regions comprises a planar surface on the first side of the first contact of the lead frame, and wherein the first contact pad of the semiconductor die is soldered to the second elevated regions on the first contact of the lead frame such that the first contact pad of the semiconductor die has two or more linear edges that each laterally aligned and parallel with at least one edge of the planar surfaces on the second elevated regions on the first contact of the lead frame.