IP Library Granted Patent US 9,081,293
Granted Patent B2
US 9,081,293 · App. 14/056,576 · Granted Jul 14, 2015

System and method for lithography exposure with correction of overlay shift induced by mask heating

Inventors: Dong-Hsu Cheng (Tainan, TW); Chun-Jen Chen (Jhubei, TW); Ming-Ho Tsai (Hsinchu, TW); Jim Liang (Hsinchu, TW); Yung-Hsiang Chen (New Taipei, TW); Jun-Hua Chen (Taipei, TW)
Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
G03F1/70G03F7/00
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Quick Facts
Patent No.
US 9,081,293
App. No.
14/056,576
Granted
Jul 14, 2015
Kind
B2
Abstract

A method of exposing a wafer substrate includes receiving an integrated circuit (IC) design layout defining a pattern; determining a temperature profile of a mask based on the IC design layout, the pattern being formed on the mask; calculating a pre-corrected overlay shift for the mask based on the calculated temperature profile; and exposing a resist layer coated on a substrate using the mask with overlay compensation based on the pre-corrected overlay shift.

Claims (65)

1. A method of exposing a wafer substrate, the method comprising:

receiving an integrated circuit (IC) design layout defining a pattern;

determining a temperature profile of a mask, wherein the pattern is formed on the mask, wherein the temperature profile is a predicted temperature of the mask predicted to occur during processing of the substrate, wherein determining the temperature profile of the mask includes determining a heating profile defined in a formula T =a1- b1*exp(-c1*x), wherein:

T is mask temperature;

x is a number of exposed substrates in a lot; and

a1, b1 and c1 are coefficients determined by mask data and exposing data;

calculating a pre-corrected overlay shift for the mask based on the temperature profile of the mask; and

exposing a resist layer coated on a substrate using the mask with overlay compensation based on the pre-corrected overlay shift.

2. The method of claim 1 , further comprising developing the resist layer to form a patterned resist layer on the substrate after the exposing a resist layer.

3. The method of claim 1 , further comprising measuring overlay shift of the patterned resist layer.

4. The method of claim 3 , further comprising optimizing the pre-corrected overlay shift based on the measured overlay shift of the patterned resist layer.

5. The method of claim 1 , wherein the temperature profile is determined based on mask data from the IC design layout.

6. The method of claim 5 , wherein the mask data includes mask transmission rate and mask pattern density.

7. The method of claim 5 , wherein the temperature profile is determined further based on exposing data.

8. The method of claim 7 , wherein the exposing data includes exposure dosage and exposure field size.

9. The method of claim 1 , wherein c1 is function of the mask data and the exposing data, defined in a formula c1 =y0 +y1*F +y2*Tr +y3*PD wherein

F is exposure field size;

Tr is mask transmission rate;

PD is mask pattern density; and

y0, y1, y2, and y3 are constants.

10. The method of claim 1 , wherein determining the temperature profile of the mask further includes determining a cooling profile defined in a formula T =exp(-c2*(x-d2)), wherein

T is mask temperature;

x is cooling time; and

c2 and d2 are coefficients determined by mask data and exposing data.

11. The method of claim 10 , wherein c2 is function of the mask data and the exposing data, defined in a formula c2=z0+z1*Tr +z2*PD wherein

Tr is mask transmission rate;

PD is mask pattern density; and

z0, z1, and z2 are constants.

12. The method of claim 1 , wherein the temperature profile includes temperature distribution on the mask.

13. The method of claim 1 , wherein the temperature profile of the mask further includes a cooling profile defined in a formula T =exp(-c2*(x-d2)), wherein

T is mask temperature;

x is cooling time; and

c2 and d2 are coefficients determined by mask data and exposing data.

14. A method, comprising:

coating a resist film on a substrate;

exposing the resist film in a lithography system using a mask, wherein overlay shift is compensated according to a mask temperature profile, wherein the temperature profile is a predicted temperature of the mask predicted to occur during processing of the substrate, wherein determining the temperature profile of the mask includes determining a cooling profile defined in a formula T =exp(-c2*(x-d2)), wherein:

T is mask temperature;

x is cooling time; and

c2 and d2 are coefficients determined by mask data and exposing data; and

developing the exposed resist film to form a pattern resist film.

15. The method of claim 14 , wherein the exposing the resist film includes:

receiving an IC design layout that defines a pattern formed on the mask;

determining a temperature profile of the mask based on the IC design layout;

calculating a pre-corrected overlay shift for the mask based on the calculated temperature profile; and

exposing a resist film using the mask with overlay compensation based on the pre-corrected overlay shift.

16. The method of claim 15 , wherein the temperature profile is determined further based on exposing data selected from the group consisting of exposure dosage, exposure field size, and a combination thereof.

17. The method of claim 14 , further comprising:

measuring overlay shift of the patterned resist film; and

optimizing the pre-corrected overlay shift based on the measured overlay shift.

18. The method of claim 14 , wherein determining the temperature profile of the mask further includes determining a heating profile defined in a formula T =a1- b1*exp(-c1*x), wherein

T is mask temperature;

x is a number of exposed substrates in a lot; and

a1, b1 and c1 are coefficients determined by mask data and exposing data.

19. A lithography system, comprising:

an exposing tool designed to expose a resist layer coated on a substrate using a mask;

an integrated circuit (IC) design layout database having an IC design layout defined on the mask; and

a smart overlay controller to calculate a predicted overlay using a temperature profile of the mask, wherein the temperature profile is a predicted temperature of the mask predicted to occur during processing of the substrate, wherein the temperature profile of the mask includes a heating profile defined in a formula T =a1- b1*exp(-c1*x), wherein:

T is mask temperature;

x is a number of exposed substrates in a lot; and

a1, b1 and c1 are coefficients determined by mask data and exposing data.

20. The lithography system of claim 19 , wherein c1 is function of the mask data and the exposing data, defined in a formula c1=y0+y1*F +y2*Tr +y3*PD wherein

F is exposure field size;

Tr is mask transmission rate;

PD is mask pattern density; and

y0, y1, y2, and y3 are constants.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 17, 2013
From: CHENG, DONG-HSU; CHEN, CHUN-JEN; TSAI, MING-HO; LIANG, JIM; CHEN, YUNG-HSIANG; CHENG, JUN-HUA
To: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
Reel/Frame 031428/0087 →
Continuity (2)
Provisional Application 61777992 · Mar 12, 2013
Related Publication 20140272717A1 · Sep 18, 2014