Semiconductor device with buried bit line and method for fabricating the same

1. A method for fabricating a semiconductor device, comprising:

defining trenches in a substrate;

forming buried bit lines to partially fill the trenches;

forming a first source/drain layer to fill remaining portions of the trenches on the buried bit lines;

sequentially forming a second source/drain layer and a channel layer on an entire surface of a sacrificial substrate;

bonding the substrate and the sacrificial substrate with each other for the first source/drain layer and the channel layer to face each other;

removing the sacrificial substrate;

forming stack patterns by selectively etching the second source/drain layer and the channel layer for the etched channel layer to contact with the first source/drain layer; and

forming word lines to cross with the buried bit lines and be disposed adjacent to sidewalls of the channel layer.

2. The method according to claim 1 , wherein the stack patterns include pillar type patterns disposed at intersections of the word lines with the buried bit lines.

3. The semiconductor device according to claim 2 , wherein the word lines extend in one direction and surround the channel layer of the stack patterns.

4. The method according to claim 2 , the forming of the first source/drain layer comprising:

forming a semiconductor layer on the substrate including the buried bit lines;

performing a planarization process until the substrate is exposed;

selectively etching the semiconductor layer to form the first source/drain layer on the buried bit lines at the intersections; and

forming a dielectric layer to fill remaining portions of the trenches between portions of the first source/drain layer.

5. The method according to claim 1 , further comprises:

forming a gate dielectric layer on a surface of a resultant structure including the stack patterns before the forming of the word lines.