IP Library Granted Patent US 9,136,342
Granted Patent B2
US 9,136,342 · App. 14/495,835 · Granted Sep 15, 2015

Thin film transistor and manufacturing method thereof

Inventors: Yeon Taek Jeong (Seoul, KR); Bo Sung Kim (Seoul, KR); Doo-Hyoung Lee (Suwon-si, KR); June Whan Choi (Seoul, KR); Tae-Young Choi (Seoul, KR); Kano Masataka (Hwaseong-si, KR)
Assignee: SAMSUNG DISPLAY CO., LTD.
H01L29/42384H01L29/4908H01L29/51H01L29/512H01L29/786H01L2029/42388
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 9,136,342
App. No.
14/495,835
Granted
Sep 15, 2015
Kind
B2
Abstract

A thin film transistor is provided. A thin film transistor according to an exemplary embodiment of the present invention includes: a substrate; a gate line disposed on the substrate and including a gate electrode; a semiconductor layer disposed on the substrate and including at least a portion overlapping the gate electrode; a gate insulating layer disposed between the gate line and the semiconductor layer; and a source electrode and a drain electrode disposed on the substrate and facing each other over a channel region of the semiconductor layer. The gate insulating layer includes a first region and a second region, the first region corresponds to the channel region of the semiconductor layer, the first region is made of a first material, the second region is made of a second material, and the first material and the second material have different atomic number ratios of carbon and silicon.

Claims (30)

1. A thin film transistor comprising:

a substrate;

a gate line disposed on the substrate and comprising a gate electrode;

a semiconductor layer disposed on the substrate and comprising at least a portion overlapping the gate electrode;

a gate insulating layer disposed between the gate line and the semiconductor layer; and

a source electrode and a drain electrode disposed on the substrate and facing each other over a channel region of the semiconductor layer,

wherein the gate insulating layer comprises a first region and a second region, and the first region corresponds to the channel region of the semiconductor layer; and

wherein the first region is made of a first material having a first atomic number ratio of carbon to silicon, the second region is made of a second material having a second atomic number ratio of carbon to silicon, and the first atomic number ratio is smaller than the second atomic number ratio.

2. The thin film transistor of claim 1 , wherein

a dielectric constant of the first region is larger than the dielectric constant of the second region.

3. The thin film transistor of claim 2 , wherein

a capacitance of a capacitor including the first region is larger than the capacitance of a capacitor including the second region.

4. The thin film transistor of claim 3 , wherein

the gate insulating layer is formed by using a solution type of insulating material.

5. The thin film transistor of claim 4 , wherein

the solution type insulating material comprises organo-siloxane or organo-silsequioxane.

6. The thin film transistor of claim 1 , wherein

a thickness of the first region of the gate insulating layer is substantially the same as that of the second region of the gate insulating layer.

7. The thin film transistor of claim 1 , wherein

the gate insulating layer comprises organo-siloxane or organo-silsequioxane.

8. The thin film transistor of claim 7 , wherein

a capacitance of a capacitor including the first region is larger than a capacitance of a capacitor including the second region.

9. A thin film transistor comprising:

a substrate;

a gate line disposed on the substrate and including a gate electrode;

a semiconductor layer disposed on the substrate and including at least a portion overlapping the gate electrode;

a gate insulating layer disposed between the gate line and the semiconductor layer; and

a source electrode and a drain electrode disposed on the substrate and facing each other over a channel region of the semiconductor layer,

wherein the gate insulating layer includes a first region and a second region, and the first region corresponds to a channel region of the semiconductor layer; and

wherein the first region and the second region are disposed at a same level, a thickness of the gate insulating layer is substantially the same in the first region as in the second region, and an atomic number ratio of carbon to silicon for the first region is smaller than an atomic number ratio of carbon to silicon for the second region, so that dielectric constants of the first region and the second region are different from each other.

Priority Claims (1)
KR 10-2011-0090618 · Sep 7, 2011 · national
Continuity (2)
Division 13436689 · Mar 30, 2012
Related Publication 20150008437A1 · Jan 8, 2015