Methods and apparatus for doped SiGe source/drain stressor deposition
View Patent ↗A semiconductor device system, structure and method of manufacture of a source/drain with SiGe stressor material to address effects due to dopant out-diffusion are disclosed. In an embodiment, a semiconductor substrate is provided with a gate structure, and recesses for source and drain are formed on opposing sides of the gate structure. Doped stressors are embedded into the recessed source and drain regions, and a plurality of layers of undoped stressor, lightly doped stressor, highly doped stressor, and a cap layer are formed in an in-situ epitaxial process. In another embodiment the doped stressor material is boron doped epitaxial SiGe. In an alternative embodiment an additional layer of undoped stressor material is formed.
1. A semiconductor device comprising:
a gate structure on a semiconductor substrate; and
a source region and a drain region recess formed in the semiconductor substrate on opposing sides of the gate structure;
wherein each of the source region and the drain region recesses is filled with a plurality of doped stressor layers, comprising a first layer of undoped stressor material layer, a second layer of lightly doped stressor material including dopant atoms, a highly doped layer of stressor material having a concentration of dopant atoms greater than the lightly doped second layer, a cap layer over the highly doped layer and having a concentration of dopant atoms greater than the highly doped layer, and a third undoped layer of stressor material free from dopant atoms disposed between the second layer and the highly doped layer;
wherein the second layer is disposed over the first layer and extends into a recess formed by an upper surface of the first layer; and
wherein the highly doped layer is disposed over the second layer and extends into a recess formed by an upper surface of the second layer.
2. The semiconductor device of claim 1 , wherein the dopant atoms comprise boron.
3. The semiconductor device of claim 1 , wherein the doped stressor is SiGe doped with boron.
4. The semiconductor device of claim 1 , wherein the doped stressor comprises e-SiGe.
5. The semiconductor device of claim 1 , wherein the source region and drain region recess each have V shaped sidewalls.
6. The semiconductor device of claim 1 , wherein the first layer has a thickness of between 1 and 20 nanometers.
7. The semiconductor device of claim 1 , wherein the dopant concentration of the second lightly doped stressor layer is between 3×10 18 /cm 3 and 1×10 19 /cm 3 .
8. The semiconductor device of claim 1 , wherein the dopant concentration of the highly doped stressor layer is between 6×10 19 /cm 3 and 5×10 20 /cm 3 .
9. A PMOS transistor, comprising:
a gate structure on a silicon substrate; and
a source region recess and a drain region recess formed in the silicon substrate on opposing sides of the gate structure;
wherein each of the source region and the drain region recesses is filled with a plurality of boron doped SiGe stressor layers, comprising a first layer of undoped SiGe stressor material, a second layer of lightly boron doped SiGe stressor material over the first layer, a third layer of undoped SiGe stressor material over the second layer, a highly boron doped layer of SiGe stressor material over the third layer and having a concentration of dopant atoms greater than the lightly doped second layer, and a cap layer of boron doped SiGe stressor material over the highly doped layer having a concentration of dopant atoms greater than the highly doped layer.
10. The PMOS transistor of claim 9 , wherein a channel region underlying the gate structure receives compressive stress due to the SiGe stressor layers in the source region and drain region recesses.
11. A semiconductor device comprising:
a substrate including a gate structure having dummy sidewalls on the gate structure;
V shaped recesses on opposing sides of the gate structure; and
a plurality of doped stressor layers in each of the recesses, comprising:
a first layer of stressor material having a first dopant concentration;
a lightly doped layer of stressor material over the first layer and having a second dopant concentration higher than the first dopant concentration,
a highly doped layer of stressor material over and extending into the lightly doped layer, a bottommost potion of the highly doped layer extending below a topmost portion of the lightly doped layer and into a recess in the lightly doped layer, the highly doped layer having a third dopant concentration greater than the second dopant concentration,
a third undoped layer of stressor material between the lightly doped layer of stressor material and the highly doped layer of stressor material; and
a cap layer of doped stressor material overlying the highly doped layer of stressor material and having a fourth dopant concentration greater than the third dopant concentration.
12. The semiconductor device of claim 11 , wherein at least one of the plurality of doped stressor layers comprises SiGe doped with boron.
13. The semiconductor device of claim 11 , wherein the lightly doped layer comprises a boron doped SiGe layer, and wherein the second dopant concentration is between 3×10 18 /cm 3 and 1×10 19 /cm 3 .
14. The semiconductor device of claim 11 , wherein the highly doped layer of stressor material comprises a boron doped SiGe layer, and wherein the third dopant concentration is between 3×10 18 /cm 3 and 1×10 19 /cm 3 .
15. The semiconductor device of claim 11 , wherein the cap layer comprises a boron doped SiGe layer, and wherein the fourth doping concentration is between 8×10 20 /cm 3 and 4×10 21 /cm 3 .
16. The semiconductor device of claim 11 , wherein the first doping concentration is about 0, and wherein the first stressor layer comprises an undoped SiGe layer.
17. The semiconductor device of claim 11 , wherein the V shaped recesses each extend under one of the dummy sidewalls.
18. The semiconductor device of claim 11 , wherein the first layer contacts a first sidewall and a second sidewall of the lightly doped layer, the first sidewall of the lightly doped layer opposite the second sidewall of the lightly doped layer.