Methods of making word lines and select lines in NAND flash memory
A NAND flash memory chip includes word lines formed by etching through concentric conductive loops and, in the same etch step, etching through a conductive strip to form select lines. A conductive loop forms two word lines which are in different erase blocks and are separately controlled by peripheral circuits.
1. A method of forming a NAND flash memory array comprising:
forming a plurality of concentric closed loops of a conductive material enclosing a central area;
forming a continuous strip of the conductive material in the central area;
dividing each of the plurality of concentric closed loops into two word lines using an etch step defined by a mask pattern; and
dividing the continuous strip into separate select lines using the etch step defined by the mask pattern.
2. The method of claim 1 wherein the mask pattern defines an opening extending across the continuous strip in the central area and across the plurality of concentric closed loops on either side of the central area.
3. The method of claim 2 wherein the opening separates a first erase block of the NAND flash memory array from a second erase block of the NAND flash memory array.
4. The method of claim 3 further comprising dividing additional concentric closed loops of the conductive material that enclose an additional central area in order to form additional word lines in the first erase block.
5. The method of claim 4 further comprising dividing an additional continuous strip in the additional central area to form additional select lines.
6. The method of claim 5 wherein NAND strings extend from the select line to one of the additional select lines.
7. The method of claim 3 further comprising forming additional select lines that are not within a central area of a plurality of concentric closed loops.
8. The method of claim 7 wherein NAND strings of the first block extend from a select line to one of the additional select lines.
9. The method of claim 8 wherein the plurality of concentric closed loops forms all of the word lines of the first block and all of the word lines of the second block.
10. A method of forming a NAND flash memory array comprising:
performing a first etch step according to a first pattern to form closed loops of a conductive material and to form a strip of the conductive material; and
subsequently performing a second etch step according to a second pattern to divide each closed loop into two separate word lines and to divide the strip into two separate select lines.
11. The method of claim 10 wherein the two separate word lines are formed in two separate erase blocks.
12. The method of claim 10 wherein the two separate select lines are formed in two separate erase blocks.
13. The method of claim 10 further comprising using the second etch step according to the second pattern to divide a portion of conductive material that is in contact with a closed loop into a first landing pad connected to a first word line and a second landing pad connected to a second word line.